DMI COLLEGE OF ENGINEERING

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1 DMI COLLEGE OF ENGINEERING PALANCHUR CHENNAI DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING LABORATORY MANUAL SUB CODE SUBJECT TITLE SEMESTER YEAR DEPARTMENT : EC8461 : CIRCUITS DESIGN AND SIMULATION LABORATORY : IV : II : ELECTRONICS AND COMMUNICATION ENGINEERING

2 Vision of the Department To develop committed and competent technologists in electronics and communication engineering to be on par with global standards coupled with cultivating the innovations and ethical values. Mission of the Department: DM 1: To be a centre of excellence in teaching learning process promoting active learning with critical thinking. DM 2: To strengthen the student s core domain and to sustain collaborative industry interaction with internship and incorporating entrepreneur skills. DM 3: To prepare the students for higher education and research oriented activities imbibed with ethical values for addressing the social need. PROGRAM EDUCATIONAL OBJECTIVES (PEOs): PEO1. CORE COMPETENCY WITH EMPLOYABILITY SKILLS: Building on fundamental knowledge, to analyze, design and implement electronic circuits and systems in Electronics and Communication Engineering by applying knowledge of mathematics and science or in closely related fields with employability skills. PEO2. PROMOTE HIGHER EDUCATION AND RESEARCH AND DEVELOPMENT: To develop the ability to demonstrate technical competence and innovation that initiates interest for higher studies and research. PEO3. INCULCATING ENTREPRENEUR SKILLS: To motivate the students to become Entrepreneurs in multidisciplinary domain by adapting to the latest trends in technology catering the social needs. PEO4. ETHICAL PROFESSIONALISM: To develop the graduates to attain professional excellence with ethical attitude, communication skills, team work and develop solutions to the problems and exercise their capabilities. DMI College of Engineering 2

3 PROGRAM OUTCOMES (POs) The Program Outcomes (POs) are described as. 1. Engineering Knowledge: Apply the knowledge of mathematics, science, engineering fundamentals and an engineering specialization to the solution of complex engineering problems. 2. Problem Analysis: Identify, formulate, review research literature, and analyze complex engineering problems reaching substantiated conclusions using first principles of mathematics, natural sciences, and engineering sciences. 3. Design / Development of solutions: Design solutions for complex engineering problems and design system components or processes that meet the specified needs with appropriate consideration for the public health and safety, and the cultural, societal, and environmental considerations. 4. Conduct investigations of complex problems: Use research-based knowledge and research methods including design of experiments, analysis and interpretation of data, and synthesis of the information to provide valid conclusions. 5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern engineering and IT tools including prediction and modelling to complex engineering activities with an understanding of the limitations. 6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to the professional engineering practice. 7. Environment and sustainability: Understand the impact of the professional engineering solutions in societal and environmental contexts, and demonstrate the knowledge of, and need for sustainable development. 8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms of the engineering practice. 9. Individual and team work: Function effectively as an individual and as a member or leader in diverse teams, and in multidisciplinary settings. DMI College of Engineering 3

4 10. Communication: Communicate effectively on complex engineering activities with the engineering community and with society at large, such as, being able to comprehend and write effective reports and design documentation, make effective presentations, and give and receive clear instructions. 11. Project management and finance: Demonstrate knowledge and understanding of the engineering management principles and apply these to one s own work, as a member and leader in a team, to manage projects and in multidisciplinary environments. 12. Life-long learning: Recognize the need for and have the preparation and ability to engage in independent and lifelong learning in the broadest context of technological change. PROGRAM SPECIFIC OUTCOMES (PSOs): PSO1. Analyze and design the analog and digital circuits or systems for a given specification and function. PSO2. Implement functional blocks of hardware-software co-designs for signal processing and communication applications. PSO3. Design, develop and test electronic and embedded systems for applications with real time constraint and to develop managerial skills with ethical behavior to work in a sustainable environment. DMI College of Engineering 4

5 INSTRUCTIONS TO STUDENTS FOR WRITING THE RECORD In the record, the index page should be filled properly by writing the corresponding experiment number, experiment name, date on which it was done and the page number. On the right side page of the record following has to be written: 1. Title: The title of the experiment should be written in the page in capital letters. In the left top margin, experiment number and date should be written. 2. Aim: The purpose of the experiment should be written clearly. 3. Apparatus/Tools/Equipments/Components used: A list of the Apparatus/Tools/ Equipments/ Components used for doing the experiment should be entered. 4. Theory: Simple working of the circuit/experimental set up/algorithm should be written. 5. Procedure: Steps for doing the experiment and recording the readings should be briefly described(flow chart/ Circuit Diagrams / programs in the case of computer/processor related experiments) 6. Results: The results of the experiment must be summarized in writing and should be fulfilling the aim. On the Left side page of the record following has to be recorded: a) Circuit/Program: Neatly drawn circuit diagrams for the experimental set up. b) Design: The design of the circuit components for the experimental set up for selecting the components should be clearly shown if necessary. Observations: i. Data should be clearly recorded using Tabular Columns. ii. Unit of the observed data should be clearly mentioned. iii. Relevant calculations should be shown. If repetitive calculations are needed, only show a sample calculation and summarize the others in a table. DMI College of Engineering 5

6 EC Circuits And Simulation Integrated Laboratory LIST OF EXPERIMENTS L P T C DESIGN AND ANALYSIS OF THE FOLLOWING CIRCUITS 1. Series and Shunt feedback amplifiers-frequency response, Input and output impedance calculation 2. RC Phase shift oscillator and Wien Bridge Oscillator 3. Hartley Oscillator and Colpitts Oscillator 4. Single Tuned Amplifier 5. RC Integrator and Differentiator circuits 6. Astable and Monostable multivibrators 7. Clippers and Clampers SIMULATION USING SPICE (Using Transistor): 1. Tuned Collector Oscillator 2. Twin -T Oscillator / Wein Bridge Oscillator 3. Double and Stagger tuned Amplifiers 4. Bistable Multivibrator 5. Schmitt Trigger circuit with Predictable hysteresis 6. Analysis of power Amplifiers. TOTAL : 45 PERIODS DMI College of Engineering 6

7 Course outcomes: CO 1 CO 2 CO 3 CO 4 CO 5 Analyze various types of feedback amplifiers Design oscillators, tuned amplifiers Design wave-shaping circuits. Design multi vibrators Design and simulate feedback amplifiers, oscillators, tuned amplifiers, wave-shaping circuits and multivibrators using SPICE Tool. CO PO, PSO Mappings Course Program Outcomes PSO Code and Course CO name EC8461 CO Circuits CO And CO Simulation CO Integrated Laboratory CO Average DMI College of Engineering 7

8 CONTENTS Sl. No. Name of the Experiment DESIGN EXPERIMENTS 1.a Current series feedback amplifer 9 1.b Voltage shunt feedback amplifier 16 2.a RC phase shift oscillator 23 2.b Wein- Bridge oscillator 29 3.a Hartley s oscillator 34 3.b Colpitt s oscillator 40 4 Single Tuned Oscillator 45 5 RC Integrator and Differentiator circuits 50 6.a Astable Multivibrator 55 6.b Monostable Multivibrator 60 7 Clippers and Clampers 66 SIMULATION USING SPICE EXPERIMENTS 9 Tuned Collector oscillator Wein-Bridge Oscillator Double and Stagger tuned Amplifier Bistatble Multivibrator Schmitt Trigger circuit with Predictable hysteresis Analysis of power amplifier 88 CONTENT BEYOND THE SYLLABUS Page No. 15 Voltage and Current Time base circuits 93 DMI College of Engineering 8

9 Ex. No.: 1.a Date: CURRENT SERIES FEEDBACK AMPLIFER AIM: response. To design a negative feedback amplifier and to draw its frequency REQUIREMENTS: S.No EQUIPMENTS RANGE QUANTIT Y 1 AFO (0-1)MHz 1 2 CRO (0-20)MHz 1 3 Resistors 1.5 K, 6KΏ, Each one 2K, 14k, 2.3K, 10K 4 Power supply (0-30V) 1 5 Transistors BC Capacitors 28 F, 10 F,720 F 1 Design examples: V CC = 15V, I C =1mA, A V = 30, f L = 50Hz, S=3, hfe= 100, hie= 1.1KΏ Gain formula is, A V = - h FE R Leff / hie Assume, V CE = V CC / 2 (transistor in active region) V CE = 15 /2=7.5V V E = V CC / 10= 15/10=1.5V Emitter resistance is given by, re =26mV/ I E Therefore r e =26 Ώ hie= hfe re hie =2.6KΏ (i) To calculate RC: Applying KVL to output loop, V CC = I C R C + V CE + I E R E (1) Where R E = V E / I E (I C = I E ) R E = 1.5 / 1x10-3= 1.5KΏ From equation (1), R C = 6KΏ DMI College of Engineering 9

10 (ii) To calculate RB1&RB2: Since I B is small when compared with I C, I C ~ I E V B = V BE + V E = =2.2V V B = V CC (R B2 / R B1 + R B2 ) (2) S=1+ (R B / R E ) R B = 2KΏ We know that R B = R B1 R B2 R B = R B1 R B2 / R B1 +R B (3) Solving equation (2) & (3), Therefore, R B1 = 14KΏ From equation (3), R B2 = 2.3KΏ (iii) To find input coupling capacitor (Ci): X Ci = (hie R B ) / 10 X Ci = 113 X Ci = 1/ 2пf C i C i = 1 / 2пf X Ci Ci = 1/ 2X3.14X 50 X 113=28µf (iv)to find output coupling capacitor (CO): X CO = (R C R L ) / 10, (Assume R L = 10KΏ) X CO = 375 X CO = 1/ 2пf CO C O = 1/ 2x 3.14x 50 x 375=8µf =10 µf (v) To find Bypass capacitor (CE): (Without feedback) X CE = {(R B +hie / 1+ hfe) R E }/ 10 X CE = C E = 1 / 2пf XCE C E = 720 µf Design with feedback: To design with feedback remove the bypass capacitor (C E ). Assume R E = 10KΏ DMI College of Engineering 10

11 CIRCUIT DIAGRAM: WITHOUT FEED BACK: WITH FEEDBACK: DMI College of Engineering 11

12 MODEL TABULATION: Without feedback: Vi= Frequency Output Voltage Gain = 20 log(v 0 /V i ) Sl. No Gain = V 0 /V i (Hz) (V 0 ) (volts) (db) With feedback: Vi= Frequency Output Voltage Gain = 20 log(v 0 /V i ) Sl. No Gain = V 0 /V i (Hz) (V 0 ) (volts) (db) MODEL GRAPH: DMI College of Engineering 12

13 THEORY Negative feedback in general increases the bandwidth of the transfer function stabilized by the specific type of feedback used in a circuit. In Voltage series feedback amplifier, consider a common emitter stage with a resistance R connected from emitter to ground. This is a case of voltage series feedback and we expect the bandwidth of the transresistance to be improved due to the feedback through R. The voltage source is represented by its Norton s equivalent current source Is=Vs/Rs. PROCEDURE: 1. Connect the circuit as per the circuit diagram. 2. Set V CC = 10V; set input voltage using audio frequency oscillator. 3. By varying audio frequency oscillator take down output frequency oscillator voltage for difference in frequency. 4. Calculate the gain in db 5. Plot gain Vs frequency curve in semi-log sheet. 6. Repeat the steps 1 to 6 with feedback 7. Compare this response with respect to the amplifier without feedback. INFERENCE: Thus current series feedback amplifier is designed and studied its performance. Parameters Theoretical Practical With Feed Back Without Feed Back With Feed Back Input Impedance Output Impedance Gain(midband) Bandwidth Without Feed Back DMI College of Engineering 13

14 VIVA QUESTIONS: 1. What is feedback? 2. What are the parameters used to design the amplifier. 3. Compare the input impedance for with and without feedback? 4. Compare the theortical and practical bandwidth for with feedback. 5. Calculate the value of output impedance with and without feed back. DMI College of Engineering 14

15 WORK SHEET DMI College of Engineering 15

16 Ex. No.: 1.b Date: VOLTAGE SHUNT FEEDBACK AMPLIFIER AIM: To design and study frequency response of voltage shunt feedback amplifier. REQUIREMENTS: Equipment S.No List 1. Equipments 2. Components 3. Other accessories Name Range Quantity Signal generator (0-30)MHz 1 CRO (0-20)V 1 Regulated Power Supply (0-30)V 1 Resistor 3k, k,5k 2.5 k,1k, Capacitor 66 F, 1 30 F,58 µf Transistors BC Bread board - 1 Connecting Wires Single As required strand DESIGN PROCEDURE: Given specifications: V CC = 10V, I C =1.2mA, A V = 30, f I = 1 khz, S=2, h FE = 150, β=0.4 The feedback factor, β= - 1/R F = +1/0.4=2.5KΏ (i) To calculate RC: The voltage gain is given by, A V = -hfe (R C R F ) / hie h ie = β re re = 26mV / I E = 26mV / 1.2mA = 21.6 hie = 150 x 21.6 =3.2K Apply KVL to output loop, V CC = I C R C + V CE + I E R E (1) Where V E = I E R E (I C = I E ) V E = V CC / 10= 1V Therefore R E = 1/1.2x10-3=0.8K= 1KΏ DMI College of Engineering 16

17 V CE = V CC /2= 5V From equation (1), RC= 3 KΏ (ii) To calculate R1&R2: S=1+ (R B /R E ) R B = (S-1) R E = R 1 R 2 =1KΏ R B = R 1 R 2 / R 1 + R (2) V B = V BE + V E = = 1.7V V B = V CC R 2 / R 1 + R (3) Solving equation (2) & (3), R 1 = 5 KΏ & R 2 = 1.1KΏ (iii) To calculate Resistance: Output resistance is given by, R O = R C R F R O = 1.3KΏ input impedance is given by, R i = (R B R F ) hie = 0.6KΏ Trans-resistance is given by, R m = -hfe (R B R F )( R C R F ) / (R B R F )+ hie R m = 0.06KΏ AC parameter with feedback network: (i) Input Impedance: R if = R i /D (where D= 1+β Rm) Therefore D = 25 R if = 24 Input coupling capacitor is given by, Xci= R if / 10= 2.4 (since X Ci << R if ) Ci = 1/ 2пfX Ci =66µf (ii) Output impedance: R Of = R O / D = 52 Output coupling capacitor: X CO = Rof /10= 5.2 C O = 1/ 2пfX CO = 30µf (iii) Emitter capacitor: X CE << R E = R /10 R E = R E {( hie +R B ) / (1+hfe)} X CE = 2.7 Therefore C E = 58µf DMI College of Engineering 17

18 WITHOUT FEED BACK CIRCUIT DIAGRAM: +10V R1 RC 3K 5K C1 Rs Ci Q1 1n VCC 1k 66uf 5V Vi R2 1.1K R5 1k CE 58uf WITH FEED BACK CIRCUIT DIAGRAM DMI College of Engineering 18

19 MODEL TABULATION: Without feedback: Vi= Frequency Output Voltage Gain = 20 log(v 0 /V i ) Sl. No Gain = V 0 /V i (Hz) (V 0 ) (volts) (db) With feedback: Vi= Frequency Output Voltage Gain = 20 log(v 0 /V i ) Sl. No Gain = V 0 /V i (Hz) (V 0 ) (volts) (db) MODEL GRAPH: DMI College of Engineering 19

20 THEORY: Negative feedback in general increases the bandwidth of the transfer function stabilized by the specific type of feedback used in a circuit. In Voltage shunt feedback amplifier, consider a common emitter stage with a resistance R connected from collector to base. This is a case of voltage shunt feedback and we expect the bandwidth of the Trans resistance to be improved due to the feedback through R. The voltage source is represented by its Norton s equivalent current source Is=Vs/Rs. PROCEDURE: 1. Connect the circuit as per the circuit diagram. 2. Set V CC = 10V; set input voltage using audio frequency oscillator. 3. By varying audio frequency oscillator take down output frequency oscillator voltage for difference in frequency. 4. Calculate the gain in db 5. Plot gain Vs frequency curve in semi-log sheet. 6. Repeat the steps 1 to 6 with feedback 7. Compare this response with respect to the amplifier without feedback. INFERENCE: Thus voltage shunt feedback amplifier is designed and studied its performance. Parameters Theoretical Practical With Feed Back Without Feed Back With Feed Back Input Impedance Output Impedance Gain(midband) Bandwidth Without Feed Back DMI College of Engineering 20

21 VIVA QUESTIONS: 1. Compare the bandwidth of feedback amplifier. 2. Give the stability of gain with feedback. 3. Which sampling and mixing network is used in Voltage shunt feed back amplifier, 4. Calculate the input impedance for with feed back. 5. What type of feedback is used in amplifier? DMI College of Engineering 21

22 WORK SHEET DMI College of Engineering 22

23 Ex. No.: 2.a Date: RC PHASE SHIFT OSCILLATOR AIM: To design a RC phase shift oscillator and to find the frequency of oscillation REQUIREMENTS: Design Example: S. RANGE N o REQUIREMENT S 1 Resistors 7.5k,1.4 k 4.8K,1.2K, 19K, 6.5K QUANT ITY 1each, 3 2 Power supply (0-30)V 1 3 Transistor BC Capacitors 1.3 f, 2.1 f, 1,1,3 1.3 f, 0.01 F 5 CRO (0-30)MHz 1 6 Bread board - 1 Specifications: V CC = 12V, I C q =1mA, =100, Vceq = 5V, f=1 KHz, S=10, C=0.01 µf, h fe = 330, A V = 29 Design: (i)to find R: Assume f=1 KHz, C=0.01µf f=1/2 RC 6 R=1/2x x1x10 3 x0.01x10-6 =6.5KΩ Therefore R=6.5KΩ (ii)to find RE & RC: V CE = V CC /2 = 6V DMI College of Engineering 23

24 4800 =4.8K r e = 26mV / I E = 26 h ie = h fe r e = 330 x 26= 8580 On applying KVL to output loop, V CC =I C R C + V CE + I E R E (1) V E = I E R E R E = V E / I E =1.2/ 10-3 =1.2K From equation (1), 12= 10-3 (R C ) +6= R C = (iii)to calculate R1 & R2: V BB = V CC R 2 / R 1 + R (2) V B = V BE +V E = =1.9V From equation (2), 1.9= 12 R 2 / R 1 + R 2 R 2 / R 1 + R 2 = (3) S = 1+ R B / R E = R B = 1.2K R B =R 1 R R 1 = 1.2x10-3 =7.5K R 2 =0.158 R R 2, R 2 = 1.425K (iv)to calculate Coupling capacitors: (i) X Ci = {[h ie + (1+h fe ) R E ] R B }/ 10 = 0.12K X Ci = 1 / 2 f C i == 1.3 f (ii) X CO = R Leff / 10 [ A V = - h fe R Leff / h ie ] R Leff = 0.74K, X CO =0.075 K X CO = 1 / 2 f C O, C O = 2.1 f (iii) X CE = R E / 10 = f X CE = 1 / 2 f C E =49.27 f (iv) Feed back capacitor, X CF = R f / 10 C f = f = 0.01 f DMI College of Engineering 24

25 CIRCUIT DIAGRAM: MODEL GRAPH: TABULATION: Amplitude Time Period (ms) Frequency(Hz) DMI College of Engineering 25

26 THEORY: The low frequencies RC oscillators are more suitable. Tuned circuit is not an essential requirement for oscillation. The essential requirement is that there must be a 180 o phase shift around the feedback network and loop gain should be greater than unity. The 180 o phase shift in feedback signal can be achieved by suitable RC network. PROCEDURE: 1. Connect the circuit as per the circuit diagram. 2. Set V CC = 15V. 3. For the given supply the amplitude and time period is measured from CRO. 4. Frequency of oscillation is calculated by the formula f=1/t 5. Amplitude Vs time graph is drawn. INFERENCE: Thus the RC-phase shift oscillator is designed and constructed for the given frequency. Theoretical frequency : Practical frequency : DMI College of Engineering 26

27 6.10 VIVA QUESTIONS: 1. What is an oscillator? 2. What is barkhausen criterion for oscillation? 3. Which feedback is used in oscillators? 4. Give the frequency of oscillation for RC-phase shift oscillator? 5. Give the disadvantages of phase shift oscillator. DMI College of Engineering 27

28 WORK SHEET DMI College of Engineering 28

29 Ex. No.: 2.b Date: WEIN- BRIDGE OSCILLATOR AIM: To design a Wein-bridge oscillator using transistors and to find the frequency of oscillation. 9.2 REQUIREMENTS: S.No REQUIREMENTS RANGE QUANTITY 1 Resistors 2 Power supply 5V 1 3 Transistor BC Capacitors 5 CRO 1 6 Bread board 1 DESIGN EXAMPLE: Assume f=1 KHz, C=0.1µf f = 1/ 2 RC R= 1/2 fc R =1/2x3.14x1x10 3 x0.1x10 3 R= 1.59KΩ To calculate R 1 : R 1 = 10R R 1 =10x1.5K R 1 =15.9KΩ To calculate R f (Feedback resistor): R f = 2R 1 R f = 2(15.9x10 3 ) =31.8KΩ 33KΩ DMI College of Engineering 29

30 THEORY: Generally in an oscillator, amplifier stage introduces 180 o phase shift and feedback network introduces additional 180 o phase shift, to obtain a phase shift of 360 o around a loop. This is a condition for any oscillator. But Wein bridge oscillator uses a non-inverting amplifier and hence does not provide any phase shift during amplifier stage. As total phase shift requires is 0 o or 2n radians, in Wein bridge type no phase shift is necessary through feedback. Thus the total phase shift around a loop is 0 o. The output of the amplifier is applied between the terminals 1 and 3, which are the input to the feedback network. While the amplifier input is supplied from the diagonal terminals 2 and 4, which is the output from the feedback network. Thus amplifier supplied its own output through the Wein bridge as a feedback network. The two arms of the bridge, namely R 1, C 1 in series and R 2, C 2 in parallel are called frequency sensitive arms. This is because the components of these two arms decide the frequency of the oscillator. Advantage of Wein bridge oscillator is that by varying the two-capacitor values simultaneously, by mounting them on the common shaft, different frequency ranges can be provided. PROCEDURE: 1. Connect the circuit as per the circuit diagram. 2. Set V CC = 5V. 3. For the given supply the amplitude and time period is measured from CRO. 4. Frequency of oscillation is calculated by the formula f=1/t 5. Amplitude Vs time graph is drawn. DMI College of Engineering 30

31 CIRCUIT DIAGRAM MODEL GRAPH: MODEL TABULATION: Amplitude (V) Time(μs) Frequency (Hz) INFERENCE: Thus the Wein bridge oscillator is designed for the given frequency of oscillation. Theoretical frequency : Practical frequency : DMI College of Engineering 31

32 VIVA QUESTIONS: 1. Give the condition for maximum oscillation. 2. What is the frequency of oscillation under balanced condition? 3. In which way high gain is obtained in wein bridge oscillator. 4. How to improve the amplitude stability of output waveform. 5. What is the frequency of oscillation? DMI College of Engineering 32

33 WORK SHEET DMI College of Engineering 33

34 Ex. No.: 3.a Date: HARTLEY S OSCILLATOR AIM: To design and construct a Hartley oscillator at the given operating frequency. REQUIREMENTS: S.No RANGE QUANTITY EQUIPMENTS 1 Resistors 2 RPS (0-30)V 1 3 Transistor BC Capacitors 5 Inductor 10mH 2 6 CRO 30MHz 1 7 Bread board - 1 Design Example: Design of feed back Network: Given L 1 = L 2 =10mH, f=20 KHz, V CC =12V, I C =3mA, S=12 f = 1/2 ( L 1+ L2) C C= 3.2nf Amplifier design: (i) Selection of RC: Gain formula is, A V = - h fe R Leff / h ie Assume V CE =V CC /2 (Transistor active) V CE = 12/2= 6V V E =I E R E = V CC /10=1.2V V CC =I C R C + V CE + I E R E DMI College of Engineering 34

35 R C = (V CC - V CE -I E R E ) / I C Therefore R C = 1.6K =2 K (ii) Selection of RE: I C = I E =3mA R E = V E /I E R E = 1.2 / 3x10-3 =400 =1K (iii) Selection of R1 & R2: Stability factor S=12 S=1+ (R B / R E ) 12=1+ (R B /1x10 3 ) R B =11K Using potential divider rule, R B =R 1 R 2 / R 1 +R 2 & V B = (R2/ R 1 +R 2 ) V CC R B /R 1 = R 2 / R 1 +R 2 Therefore R B /R 1 = V B /V CC V B =V BE + V E = =1.9V=2V R 1 = (V CC / V B )R B R 1 = (12/2)x 11x10 3 =66K =100K V B /V CC =R 2 / R 1 +R 2 2/ 12=R 2 / 100x10 3 +R 2 (100x10 3 )+R 2 =R 2 /0.16=19K R 2 =19K =22 K (iv)output capacitance (CO): X CO =R C /10=2x10 3 /10=200 1/2 fc O =200 C O =1/2x3.14x20x10 3 x200 DMI College of Engineering 35

36 C O =0.039=0.01µf (v) Input capacitance (Ci): X Cin = R B /10=11x10 3 /10=1.1x10 3 1/2 fc in =1.1x10 3 C in =1/2x3.14x20x10 3 x1.1x10 3 C in = 0.007=0.01µf (vi) By pass Capacitance (CE): X CE =R E /10=1x10 3 /10=100 1/2 fc E =100 C E = 1/2x3.14x20x10 3 x100 C E = 0.079µf = 0.1µf THEORY: Hartley oscillator is very popular and is commonly used as local oscillator in radio receivers. The collector voltage is applied to the collector through inductor L whose reactance is high compared with X 2 and may therefore be omitted from equivalent circuit, at zero frequency, however capacitor C b acts as an open circuit. PROCEDURE: 1. Connect the circuit as per the circuit diagram. 2. Set V CC = 12V. 3. For the given supply the amplitude and time period is measured from CRO. 4. Frequency of oscillation is calculated by the formula f=1/t 5. Verify it with theoretical frequency, f= 1/2 ( ( L 1+ L2) C ) Amplitude Vs time graph is drawn. DMI College of Engineering 36

37 CIRCUIT DIAGRAM: MODEL GRAPH: MODEL TABULATION: Amplitude (V) Time(μs) Frequency (Hz) INFERENCE: Thus the Hartley oscillator is designed and constructed for the given frequency. Theoretical frequency : Practical frequency DMI College of Engineering 37

38 VIVA QUESTIONS: 1. How does an oscillator differ from an amplifier? 2. What is the approximate value of h fe in a Hartley oscillator using BJT? 3. Mention the expression for frequency of oscillation? 4. Mention the reasons why LC oscillator is preferred over RC oscillator at radio frequency? 5. How the Hartley oscillator satisfy the barkhausen criterion DMI College of Engineering 38

39 WORK SHEET DMI College of Engineering 39

40 Ex. No.: 3.b. Date: COLPITT S OSCILLTOR AIM: frequency. To design and construct a Colpitt s oscillator at the given operating 8.2 REQUIREMENTS: S.N EQUIPME RANG QUANTI o NTS E TY 1 Resistors 2 RPS (0-30)V 1 3 Transistor BC Capacitors 5 Inductor 10mH 1 6 CRO 30MHz 1 7 Bread board - 1 TAB Design of feed back Network: Given C 1 = 0.1 F, L=10mH, f=20 KHz, V CC =12V,I C =3mA, S=12 C 1+ C2 f = 1/2, C2= 0.01 F LC1C 2 Amplifier design: (i)selection of RC: Gain formula is, A V = - h fe R Leff / h ie Assume V CE =V CC /2 (Transistor active) V CE = 12/2= 6V V E =I E R E = V CC /10=1.2V V CC =I C R C + V CE + I E R E R C = (V CC - V CE -I E R E ) / I C Therefore R C = 1.6K =2 K (ii) Selection of RE: I C = I E =3mA R E = V E /I E = 1K (iii) Selection of R1 & R2: Stability factor S=12 S=1+(R B / R E ) 12=1+ (R B /1x10 3 )=11k Using potential divider rule, DMI College of Engineering 40

41 R B =R 1 R 2 / R 1 +R 2 & V B = (R2/ R 1 +R 2 ) V CC R B /R 1 = R 2 / R 1 +R 2 Therefore R B /R 1 = V B /V CC V B =V BE + V E = =1.9V=2V R 1 = (V CC / V B ) R B =66K =100K V B /V CC =R 2 / R 1 +R 2 2/ 12=R 2 / 100x10 3 +R 2 R 2 =19K =22 K (iv) Output capacitance (CO): X CO =R C /10=2x10 3 /10=200 1/2 fc O =200 C O =1/2x3.14x20x10 3 x200=0.039=0.01µf (v) Input capacitance (Ci): X Cin = R B /10=11x10 3 /10=1.1x10 3 1/2 fc in =1.1x10 3 C in =1/2x3.14x20x10 3 x1.1x10 3 =0.0101µf (vi) By pass Capacitance (CE): X CE =R E /10=1x10 3 /10=100 1/2 fc E =100 C E = 1/2x3.14x20x10 3 x100=0.079µf = 0.1µf 8.4 THEORY: Colpitt s oscillator is very popular and is commonly used as local oscillator in radio receivers. The collector voltage is applied to the collector through inductor L whose reactance is high compared with X 2 and may therefore be omitted from equivalent circuit, at zero frequency; The circuit operates as Class C. the tuned circuit determines basically the frequency of oscillation. 8.5 PROCEDURE: measured 1. Connect the circuit as per the circuit diagram. 2. Set V CC = 12V. 3. For the given supply the amplitude and time period is from CRO. 4. Frequency of oscillation is calculated by the formula f=1/t 5.Amplitude Vs time graph is drawn. DMI College of Engineering 41

42 CIRCUIT DIAGRAM: FIG 8.1 MODEL GRAPH: MODEL TABULATION: FIG 8.2 Amplitude (V) Time(μs) Frequency (Hz) TAB.8.2 INFERENCE: Thus the Collipit s oscillator is designed and constructed for the given frequency. Theoretical frequency : Practical frequency : DMI College of Engineering 42

43 VIVA QUESTIONS: 1. What is the approximate value of h fe in a colpitt s oscillator using BJT for sustained oscillation? 2. What is Tank circuit? 3. Mention the expression for frequency of oscillation? 4. What are the essential parts of an oscillator? 5. Name two high frequency oscillators? DMI College of Engineering 43

44 WORK SHEET DMI College of Engineering 44

45 Ex. No.:4 Date: SINGLE TUNED AMPLIFIER AIM: To design a single tuned amplifier and to draw its frequency response. REQUIREMENTS: S.No EQUIPMENTS RANGE QUANTITY 1 Resistors 2 RPS (0-30)V 1 3 Transistor BC Capacitors 5 CRO (0-30)MHz 1 6 Function generator (0-10)MHz 1 7 Bread board - 1 DESIGN EXAMPLE: Given specifications Vcc = 12V, β = 100, Ic = 1mA, L=1mH, f=2 KHz, S= [2-10] Assume, V CE = V CC / 2=6V To calculate C: V E = V CC / 10 =1.2V F = 1/ 2 Therefore C=0.6μf To calculate R E : LC V E = I E R E (I C = I E ) R E = V E / I E = 1.2 / 1x10-3 = 1.2K Assume S= 10, S= 1+ (R B / R E ) Therefore R B = 10K To find R 1 & R 2 : R B = R 1 R 2 R B = R 1 R 2 / R1+ R (1) V B = V CC x (R 2 / R 1 + R 2 ) (2) DMI College of Engineering 45

46 CIRCUIT DIAGRAM: MODEL GRAPH: DMI College of Engineering 46

47 TABULATION: FREQUENCY OUTPUT V O (V) V in (V) Gain 20log(V o /V in ) db THEORY: The single tuned amplifier selecting the range of frequency the resistance load replaced by the tank circuit. Tank circuit is nothing but inductors and capacitor in parallel with each other. The tuned amplifier gives the response only at particular frequency at which the output is almost zero. The resistor R 1 and R 2 provide potential diving biasing, R e and C e provide the thermal stabilization. This it fixes up the operating point. PROCEDURE: 1. Connections are given as per the circuit diagram 2. By varying frequency, amplitude is noted down 3. Gain is calculated in db 4. Frequency response curve is drawn. INFERENCE: Thus the class c single tuned amplifier is designed and frequency response is plotted. DMI College of Engineering 47

48 VIVA QUESTIONS: 1. Define Q-factor? 2. What is tuned circuit? 3. What is coil loss? 4. Give the application of Single tuned Class-C amplifier. 5. What is tank circuit? DMI College of Engineering 48

49 WORK SHEET DMI College of Engineering 49

50 Ex. No.: 5 Date: INTEGRATOR AND DIFFERENTIATOR AIM: To design and construct a differentiator and integrator circuit. REQUIREMENTS: Equipment S.No List 1. Equipments 2. Components 3. Other accessories Name Range Quantity Function (0-30)MHz 1 generator CRO (0-20)V 1 Regulated Power (0-30)V 1 Supply Resistor 1 k 1 Capacitor 1 uf 1 Bread board - 1 Connecting Wires Single As required strand THEORY: Differentiator: Differentiator is a circuit which differentiates the input signal, it allows high order frequency and blocks low order frequency. If time constant is very low it acts as a differentiator. In this circuit input is continuous pulse with high and low value. Integrator: In a low pass filter when the time constant is very large it acts as a integrator. In this the voltage drop across C will be very small in comparison with the drop across resistor R. So total input appears across the R. PROCEDURE: 1. Connections are given as per the circuit diagram. 2. Set the signal voltage. 3. Observe the output waveform. 4. Sketch the output waveform. DMI College of Engineering 50

51 INTEGRATOR: CIRCUIT DIAGRAM: MODEL TABULATION: Amplitude(V) Time(ms) Frequency(KHz) MODEL GRAPH: DMI College of Engineering 51

52 DIFFERENTIATOR CIRCUIT DIAGRAM: MODEL TABULATION: Amplitude(V) Time(ms) Frequency(KHz) MODEL GRAPH: INFERENCE: Thus the integrator and differentiator are constructed and output waveform observed and readings were tabulated. DMI College of Engineering 52

53 VIVA QUESTIONS: 1. What is wave shaping circuit? 2. What are the components used in wave shaping circuits. 3. When HPF acts as a differentiator 4. When LPF acts as an integrator. 5. How triangular waveform is obtained using integrator. DMI College of Engineering 53

54 WORK SHEET DMI College of Engineering 54

55 Ex. No.: 6.a Date: EMITTER COUPLED ASTABLE MULTIVIBRATOR AIM: To design an Emitter coupled Astable multivibrator and study the output waveform. REQUIREMENTS: S.No EQUIPMENTS RANGE QUANTITY 1 Resistors 2 RPS (0-30)V 1 3 Transistor BC Capacitors 5 CRO (0-30)MHz 1 6 Bread board - 1 DESIGN EXAMPLE: THEORY: Given specifications: V CC = 10V; hfe = 100; f=1 KHz; I c = 2mA; Vce (sat) = 0.2v; To design RC: To Design C: R h FE R C R C = V CC - V C2 (Sat) / I C = 4.9 k Since R h FE R C Therefore R 100 x 4.7 x10 3 =490 k 470 k Since T= 1.38RC 1x10-3 =1.38x 490x10 3 x C Therefore C=0.01 F The astable multivibrator generates square wave without any external triggering pulse. It has no stable state, i.e., it has two quasi- Stable states. It switches DMI College of Engineering 55

56 back and forth from one stable state to other, remaining in each state for a time depending upon the discharging of a capacitive circuit. When supply voltage + Vcc is applied, one transistor will Conduct more than the other due to some circuit imbalance. PROCEDURE: 1. Connect the circuit as per the circuit diagram. 2. Set V CC = 5V. 3. For the given supply the amplitude and time period is measured from CRO. 4. Frequency of oscillation is calculated by the formula f=1/t 5. Amplitude Vs time graph is drawn. DMI College of Engineering 56

57 CIRCUIT DIAGRAM MODEL GRAPH: FIG.8.2 DMI College of Engineering 57

58 TABULATION: Amplitude(V) Time period(msec) INFERENCE: Thus the astable multivibrator is designed and output waveform is plotted DMI College of Engineering 58

59 VIVA QUESTIONS: 1. What is meant by multivibrator? 2. What is the frequency of oscillation of astable multivibrator? 3. Distinguish oscillator and multivibrator? 4. List the applications of astable multivibrator.. 5. Why it is called as free running multivibrator. DMI College of Engineering 59

60 Ex. No.: 6.b Date: MONOSTABLE MULTIVIBRATOR AIM: To design and test the performance of Monostable multivibrator for the given frequency REQUIREMENTS: S.No EQUIPMENTS RANGE QUANTITY 1 Resistors 2 RPS (0-30)V 1 3 Transistor BC CRO (0-30)MHz 1 5 Capacitor 3.2nf 1 25pf 1 6 Bread board - 1 DESIGN EXAMPLE: Given specifications: V CC = 12V; hfe = 200; f=1 KHz; I c = 2mA; Vce (sat) = 0.2v; V BB = - 2V, (i)to calculate RC: R C = V CC - Vce (sat) / I C R C = / 2x10-3 =5.9KΩ (ii) To calculate R: I B2(min) =I C2 / h fe = 2x10-3 / 200 = 10µ A Select I B2 > I B1(min) (say 25µ A) Then R = V CC V BE (sat) / I B2 Therefore R= /25x10-6 =452KΩ (iii) To calculate C: T=0.69RC 1x10-3 = 0.69x452x10 3 xc C=3.2nf DMI College of Engineering 60

61 To calculate R1 & R2: V B1 = {(V BB R1/ R1 +R2) + (V CE (sat) R2 / R1+R2)} Since Q1 is in off state, V B1 0 Then (V BB R1/ R1 +R2) = (V CE (sat) R2 / R1+R2) V BB R1 = V CE (sat) R2 2 R1 = 0.2 R2 Assume R1=10KΩ, then R2=100 KΩ Consider, C 1 = 25pf (commutative capacitor) THEORY: The monostable multivibrator has one stable state when an external trigger input is applied the circuit changes its state from stable quasi stable state. And then automatically after some time interval the circuit returns back to the original normal stable state. The time T is dependent on circuit components. The capacitor C 1 is a speed-up capacitor coupled to base of Q2 through C. Thus DC coupling in bistable multivibrator is replaced by a capacitor coupling. The resistor R at input of Q2 is returned to V CC. The value of R2, V BB are chosen such that transistor Q1 is off by reverse biasing it. Q2 is on. This is possible by forward biasing Q2 with the help of VCC and resistance R. Thus Q2-ON and Q1-OFF is normal stable state of circuit. PROCEDURE: 1. Connect the circuit as per the circuit diagram. 2. Give a negative trigger input to Q2. 3. Note the output of transistor Q2 and Q1. 4. Find the value of T on and T off. DMI College of Engineering 61

62 CIRCUIT DIAGRAM: MODEL GRAPH: DMI College of Engineering 62

63 TABULATION: Amplitude(V) Time period (msec) TON TOFF INFERENCE: Thus the monostable multivibrator is designed and the performance is tested. Theoretical period : Practical period : DMI College of Engineering 63

64 11.10 VIVA QUESTIONS: 1. Give the other names of monostable multivibrator? 2. What is the use of commutating capacitor? 3. What is the frequency of oscillation of monostable multivibrator? 4. Why it is called as one-shot multivibrator? 5. List the applications of mono stable multivibrator. DMI College of Engineering 64

65 WORK SHEET DMI College of Engineering 65

66 Ex. No.: 7 Date: CLIPPER AND CLAMPER CIRCUITS AIM: To construct and design the clipper and clamper circuits using diodes. REQUIREMENTS: S.No Equipment List 1. Equipments 2. Components 3. Other accessories Name Range Quantity Function (0-30)MHz 1 generator CRO (0-20)V 1 Regulated Power (0-30)V 1 Supply Diode IN Resistor 1k 1 Capacitor 1uf 2 Bread board - 1 Connecting Wires Single As required strand DESIGN PROCEDURE: Given f=1 khz, T=t=1/f=1x10-3 sec=rc Assume, C=1uF Then, R=1KΩ DMI College of Engineering 66

67 POSITIVE CLIPPER CIRCUIT DIAGRAM: MODEL TABULATION: Positive Cycle (V) Negative Cycle ( V) Time (ms) Input Output MODEL GRAPH: DMI College of Engineering 67

68 NEGATIVE CLIPPER: CIRCUIT DIAGRAM: MODEL TABULATION: Positive Cycle (V) Negative Cycle( V) Time (ms) Input Output MODEL GRAPH: DMI College of Engineering 68

69 CLAMPER CIRCUIT: POSITIVE CLAMPER CIRCUIT DIAGRAM: Vin=5V MODEL TABULATION: Positive Cycle (V) Negative Cycle( V) Time (ms) Input Output MODEL GRAPH: DMI College of Engineering 69

70 NEGATIVE CLAMPER CIRCUI DIAGRAM: Vin=5V MODEL TABULATION: Input Output Positive Cycle (V) Negative Cycle( V) Time (ms) MODEL GRAPH DMI College of Engineering 70

71 THEORY CLIPPER: A Clipper is a circuit that removes either the positive or negative part of a waveform. For a positive clipper only the negative half cycle will appear as output. CLAMPER: A Clamper circuit is a circuit that adds a dc voltage to the signal. A positive clamper shifts the ac reference level upto a dc level. WORKING: During the positive half cycle, the diode turns on and looks like a short circuit across the output terminals. Ideally, the output voltage is zero. But practically, the diode voltage is 0.7 V while conducting. On the negative half cycle, the diode is open and hence the negative half cycle appear across the output. APPLICATION: Used for wave shaping To protect sensitive circuits PROCEDURE: 1. Connect as per the circuit diagram. 2. Set the signal voltage (say 5V, 1 KHz) using signal generator. 3. Observe the output waveform using CRO. 4. Sketch the output waveform. INFERENCE: Thus the output waveform for Clipper and clamper was observed and its readings are tabulated. DMI College of Engineering 71

72 VIVA QUESTIONS: 1. What are the other names of clipper circuits? 2. What is combinational clipper? 3. Why clippers are used in TV receivers. 4. Give one application of clamper. 5. What are biased clipper and clamper? DMI College of Engineering 72

73 SIMULATION USING PSPICE DMI College of Engineering 73

74 Ex. No.: 9 Date: TUNED COLLECTOR OSCILLATOR AIM: To simulate a tuned collector oscillator using PSPICE. REQUIREMENTS: 1. PC 2. PSPICE software THEORY: Tuned collector oscillation is a type of transistor LC oscillator where the tuned circuit (tank) consists of a transformer and a capacitor is connected in the collector circuit of the transistor. Tuned collector oscillator is of course the simplest and the basic type of LC oscillators. The tuned circuit connected at the collector circuit behaves like a purely resistive load at resonance and determines the oscillator frequency. The common applications of tuned collector oscillator are RF oscillator circuits, mixers, frequency demodulators, signal generators etc., PROCEDURE: 1. Click on the start menu and select the pspice simulation software 2. Select the parts required for the circuit from the parts menu and them in the work space. 3. Connect the parts using wires 4. Save the file and select the appropriate analysis 5. Simulate the circuit and observe the corresponding output waveforms. DMI College of Engineering 74

75 CIRCUIT DIAGRAM: ` MODEL GRAPH: INFERENCE: Thus the tuned collector oscillator is simulated using PSpice. DMI College of Engineering 75

76 VIVA QUESTIONS: 1. What is PSpice? 2. What is the use of Pspice? 3. What are the different types of analysis done using Spice? 4. List the limitation of Pspice 5. What are the different output commands? DMI College of Engineering 76

77 Ex. No.: 10 Date: WEIN BRIGE OSCILLATOR AIM: To simulate voltage and current time base circuits by using PSPICE. REQUIREMENTS: 1. PC 2. PSPICE software THEORY: Generally in an oscillator, amplifier stage introduces 180 o phase shift and feedback network introduces additional 180 o phase shift, to obtain a phase shift of 360 o around a loop. This is a condition for any oscillator. But Wein bridge oscillator uses a non-inverting amplifier and hence does not provide any phase shift during amplifier stage. As total phase shift requires is 0 o or 2n radians, in Wein bridge type no phase shift is necessary through feedback. Thus the total phase shift around a loop is 0 o. The output of the amplifier is applied between the terminals 1 and 3, which are the input to the feedback network. While the amplifier input is supplied from the diagonal terminals 2 and 4, which is the output from the feedback network. Thus amplifier supplied its own output through the Wein bridge as a feed back network. PROCEDURE: 1. Click on the start menu and select the pspice simulation software 2. Select the parts required for the circuit from the parts menu and place them in the work space 3. Connect the parts using wires 4. Save the file and select the appropriate analysis 5. Simulate the circuit and observe the corresponding output waveforms DMI College of Engineering 77

78 7.5 CIRCUIT DIAGRAM: MODEL GRAPH: INFERENCE: Thus the Wein Bridge Oscillator is simulated using Pspice. DMI College of Engineering 78

79 Ex. No.: 11 Date: DOUBLE AND STAGGERED TUNED AMPLIFIER AIM: To simulate double and staggered tuned amplifiers. REQUIREMENTS: 1. PC 2. PSPICE software THEORY: A double-tuned amplifier is a tuned amplifier with transformer coupling between the amplifier stages in which the inductances of both the primary and secondary windings are tuned separately with a capacitor across each. The scheme results in a wider bandwidth than a single tuned circuit would achieve. There is a critical value of transformer coupling coefficient at which the frequency response of the amplifier is maximally flat in the pass band and the gain is maximum at the resonant frequency. Designs frequently use a coupling greater than this (overcoupling) in order to achieve an even wider bandwidth at the expense of a small loss of gain in the centre of the pass band. Staggered tuning is a technique used in the design of multi-stage tuned amplifiers whereby each stage is tuned to a slightly different frequency. In comparison to synchronous tuning (where each stage is tuned identically) it produces a wider bandwidth at the expense of reduced gain. It also produces a sharper transition from the passband to the stopband. Both staggered tuning and synchronous tuning circuits are easier to tune and manufacture than many other filter types. The function of stagger-tuned circuits can be expressed as a rational function and hence they can be designed to any of the major filter responses such as Butterworth and Chebyshev. The poles of the circuit are easy to DMI College of Engineering 79

80 manipulate to achieve the desired response because of the amplifier buffering between stages. PROCEDURE: 1. Click on the start menu and select the pspice simulation software 2. Select the parts required for the circuit from the parts menu and place them in the work space 3. Connect the parts using wires 4. Save the file and select the appropriate analysis 5. Simulate the circuit and observe the corresponding output waveforms DMI College of Engineering 80

81 CIRCUIT DIAGRAM: DOUBLE TUNNED AMPLIFIER MODEL GRAPH: DOUBLE TUNNED AMPLIFIER INFERENCE: Thus the double and staggered tuned amplifier is simulated. DMI College of Engineering 81

82 Ex. No.: 12 Date: BI-STABLE MULTIVIBRATOR AIM: To simulate an Bi-stable multivibrator using PSPICE. REQUIREMENTS: 1. PC 2. PSPICE software THEORY: Bi- stable multivibrator contains two stable states and no quasi states. It requires two clock or trigger pulses to change the states. It is also called as flip flop, scale of two toggle circuit, trigger circuit. It is used in digital operations like counting, storing data s in flip flops and production of square waveforms. PROCEDURE: 1. Click on the start menu and select the pspice simulation software 2. Select the parts required for the circuit from the parts menu and place them in the work space 3. Connect the parts using wires 4. Save the file and select the appropriate analysis 5. Simulate the circuit and observe the corresponding output waveforms DMI College of Engineering 82

83 CIRCUIT DIAGRAM: MODEL GRAPH: INFERENCE: Thus the Bi-stable multivibrator is simulated using PSpice. DMI College of Engineering 83

84 VIVA QUESTIONS: 1. Define storage time of bistable multivibrator? 2. What are the different types of triggering of bistable multivibrator? 3. List the application of bistable multivibrator. 4. What is the use of triggering in bistable multivibrators? 5. Give the differences between three multivibrators. DMI College of Engineering 84

85 Ex. No.: 13 Date: SCHMITT TRIGGER CIRCUIT WITH PREDICTABLE HYSTERESIS AIM: To simulate Schmitt Trigger circuit with Predictable hysteresis. REQUIREMENTS: 1. PC 2. PSPICE software THEORY: A Schmitt trigger is a comparator circuit with hysteresis, implemented by applying positive feedback to the input of an amplifier. It is an active circuit which converts an analog input signal to a digital output signal. The circuit is named a "trigger" because the output retains its value until the input changes sufficiently to trigger a change. In the non-inverting configuration, when the input is higher than a certain chosen threshold, the output is high. When the input is below a different (lower) chosen threshold, the output is low, and when the input is between the two levels, the output retains its value. This dual threshold action is called hysteresis and implies that the Schmitt trigger possesses memory and can act as a bistable circuit (latch or flip-flop). There is a close relation between the two kinds of circuits: a Schmitt trigger can be converted into a latch and a latch can be converted into a Schmitt trigger. Schmitt trigger devices are typically used in signal conditioning applications to remove noise from signals used in digital circuits, particularly mechanical switch bounce. They are also used in closed loop negative feedback configurations to implement relaxation oscillators, used in function generators and switching power supplies. DMI College of Engineering 85

86 PROCEDURE: 1. Click on the start menu and select the pspice simulation software 2. Select the parts required for the circuit from the parts menu and place them in the work space 3. Connect the parts using wires 4. Save the file and select the appropriate analysis 5. Simulate the circuit and observe the corresponding output waveforms DMI College of Engineering 86

87 CIRCUIT DIAGRAM: MODEL GRAPH: INFERENCE: Thus the Schmitt trigger is simulated using PSpice. DMI College of Engineering 87

88 Ex. No.: 14 Date: ANALYSIS OF POWER AMPLIFIER AIM: To design and test the performance of power amplifier. REQUIREMENTS: S.No QUIPMENTS RANGE QUANTITY 1 Resistors 2 RPS (0-30)V 1 3 Transistor BC CRO (0-30)MHz 1 5 Capacitor 3.2nf 25pf Bread board - 1 DESIGN EXAMPLE: Given specifications: V CC = 12V; hfe = 200; f=1 KHz; I c = 2mA; Vce (sat) = 0.2v; V BB = - 2V, (i)to calculate RC: R C = V CC - Vce (sat) / I C R C = / 2x10-3 =5.9KΩ (ii) To calculate R: I B2(min) =I C2 / h fe = 2x10-3 / 200 = 10µ A Select I B2 > I B1(min) (say 25µ A) Then R = V CC V BE (sat) / I B2 Therefore R= /25x10-6 =452KΩ (iii) To calculate C: T=0.69RC DMI College of Engineering 88

89 1x10-3 = 0.69x452x10 3 xc C=3.2nf To calculate R1 & R2: V B1 = {(V BB R1/ R1 +R2) + (V CE (sat) R2 / R1+R2)} Since Q1 is in off state,v B1 0 Then (V BB R1/ R1 +R2) = (V CE (sat) R2 / R1+R2) V BB R1 = V CE (sat) R2 2 R1 = 0.2 R2 Assume R1=10KΩ, then R2=100 KΩ Consider, C 1 = 25pf (commutative capacitor) THEORY: An electronic amplifier is used for increasing the power of a signal. It does this by taking energy from a power supply and controlling the output to match the input signal shape but with a larger amplitude. In this sense, an amplifier may be considered as modulating the output of the power supply. PROCEDURE: 1. Connect the circuit as per the circuit diagram. 2. Give a negative trigger input to Q2. 3. Note the output of transistor Q2 and Q1. 4. Find the value of Ton and Toff. DMI College of Engineering 89

90 CIRCUIT DIAGRAM: MODEL GRAPH: DMI College of Engineering 90

91 TABULATION: Amplitude(V) Time period(msec) TON TOFF INFERENCE: Thus the Power amplifier is designed and the performance is tested. Theoretical period : Practical period : DMI College of Engineering 91

92 VIVA QUESTIONS: 1. Give the other names of power amplifier? 2. Write the importance of power amplifier? 3. What is the frequency of oscillation of power amplifier? 4. List the different types of power amplifier. 5. List the applications of power amplifier. DMI College of Engineering 92

93 Ex. No.: 15 Date: AIM: VOLTAGE AND CURRENT TIME BASE CIRCUITS To simulate voltage and current time base circuits by using PSPICE. REQUIREMENTS: THEORY: 1. PC 2. PSPICE software A time base generator, or timebase, is a special type of function generator, an electronic circuit that generates a varying voltage to produce a particular waveform. Time base generators produce very high frequency sawtooth waves specifically designed to deflect the beam in cathode ray tube (CRT) smoothly across the face of the tube and then return it to its starting position. Time bases are used by radar systems to determine range to a target, by comparing the current location along the time base to the time of arrival of radio echoes. Analog television systems using CRTs had two time bases, one for deflecting the beam horizontally in a rapid movement, and another pulling it down the screen 60 times per second.oscilloscopes often have several time bases, but these may be more flexible function generators able to produce many waveforms as well as a simple time base. PROCEDURE: 1. Click on the start menu and select the pspice simulation software 2. Select the parts required for the circuit from the parts menu and place them in the work space 3. Connect the parts using wires 4. Save the file and select the appropriate analysis 5. Simulate the circuit and observe the corresponding output waveforms DMI College of Engineering 93