Hardware Implementation of OFDM Transceiver. Authors Birangal U. M 1, Askhedkar A. R 2 1,2 MITCOE, Pune, India

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1 ABSTRACT International Journal Of Scientific Research And Education Volume 3 Issue 9 Pages October-2015 ISSN (e): Website: DOI: Hardware Implementation of OFDM Transceiver Authors Birangal U. M 1, Askhedkar A. R 2 1,2 MITCOE, Pune, India - umeshbirangal@gmail.com, anjali.askhedkar@mitcoe.edu.in Orthogonal Frequency Division multiplexing is one of the special techniques of the multicarrier modulation transmission in which the single data stream is divided into the no of lower data rate subcarriers which are orthogonal to each other s. It is the most efficient and promising technique today and it has been adopted by most of the wired and wireless communication standards. The main important blocks in the OFDM system are Modulation block (Quadrature Amplitude Modulation) and the Transform block (Fast Fourier Transform). This paper describes a design and implementation of an Orthogonal Frequency Division Multiplexing (OFDM) transceiver on FPGA to achieve higher efficiency and increased data rates. The system is designed using the Xilinx 14.4 software and is implemented on a Spartan 6 FPGA Kit and a resource utilization is given in the results. Keywords: Orthogonal Frequency Division Multiplexing (OFDM), Field Programmable Gate Array (FPGA), Fast Fourier Transform (FFT), Quadrature Amplitude Modulation (QAM). INTRODUCTION In order to avoid the inter-symbol interference (ISI) in a single carrier communication system, the symbol period must be much greater than that of the delay time. Since the data rate is inversely proportional to symbol period, and having the long symbol periods implies low data rate and communication inefficiency. In a multicarrier system such as Frequency Division Multiplexing (FDM), this divides the total available bandwidth in the spectrum into the sub-bands for multiple carriers to transmit the information in parallel [1]. An overall high data rate can be achieved by placing carriers closely in the available spectrum. However, inter carrier interference (ICI) will occur due to the lack of proper spacing to separate the nearby carriers. To avoid this inter carrier interference, guard bands will be needed to be placed in between all adjacent carriers, which results in even more increased data rates. OFDM (Orthogonal Frequency Division Multiplexing) is a multicarrier communication technique to overcome both issues [4]. It combines a large number of low data rate subcarriers to implement a composite high data rate communication system. The orthogonality gives the Birangal U. M, Askhedkar A. R IJSRE Volume 3 Issue 10 October 2015 Page 4564

2 carriers a valid reason to be closely spaced, even overlapped, without inter carrier interference between them. Low data rate of each carrier implies that it has long symbol periods and which greatly lowers intersymbol interference [3]. As OFDM has many advantages over the other available schemes, it is widely used to implement the wired as well as the wireless communication systems. FPGAs allow engineers or small groups of engineers to realize or to test their hardware and software concepts on an FPGA-based test platform without having to purchase the expensive tool sets required or to incur the extra nonrecurring engineering (NRE) costs [6]. So FPGAs were largely used to implement the state machines, glue logic, and relatively limited data processing tasks. During the early 1990s, as the size of FPGAs started to increase year by year, their big markets at that time were in the networking and telecommunications areas, both of this fields involved the processing large blocks of data and pushing that data around. SYSTEM DESCRIPTION: The OFDM transceiver is sectioned into transmitter part and receiver part. Transmitter Design: Transmitter takes the data from a source which may be serial data stream generator or data stream extracted from the image file or video file. It converts the serial data stream to lover rate parallel data streams. Then it modulates the input data using the M-QAM Encoder and finally the IFFT operation is carried out which gives Orthogonality to the signals. The main important transmitter blocks are: Serial to Parallel Convertor: The input given to the Serial to Parallel convertor block is a serial data stream of binary values. This block converts the data to parallel data streams, which are given as an input to the QAM encoder block. Fig.1 OFDM Transmitter M-QAM Modulator: QAM modulation should be used for mapping of data to complex symbols. Here the 64-QAM modulation block is implemented using the 16-QAM blocks. The input symbols are mapped to a corresponding unique complex numbers according to a constellation diagram as shown in fig 2. Birangal U. M, Askhedkar A. R IJSRE Volume 3 Issue 10 October 2015 Page 4565

3 Fig.2 Constellation diagram for 4-QAM IFFT: IFFT is the main operation in the design of the OFDM system. 64-point IFFT operation needs to be performed for the objective to be achieved. The IFFT operation is designed by using the radix-2 butterfly unit as a main basic processing element. Receiver Design: The receiver collects the transmitted data and it reconvert back into original for o the data. The main important receiver blocks are: FFT: A Fast Fourier Transform (FFT) is an algorithm to compute the Discrete Fourier Transform (DFT) and its inverse. The proposed method is based on radix-2 FFT computation using butterfly diagrams. The recursion is used to design the higher point FFT. Fig.3 OFDM Receiver M-QAM Decoder: The de-mapping of the input complex symbol is carried out using this block. The de-mapping is carried according to the constellation diagram shown in the fig 2. Parallel to Serial Convertor: This block behaves exactly opposite to that of serial to parallel block. It takes parallel data stream as an input and reconverts it to the serial data stream. The transmitted information is then available at the output of this block. Birangal U. M, Askhedkar A. R IJSRE Volume 3 Issue 10 October 2015 Page 4566

4 Software Overview: The overall Simulation Process of a design is carried out through the following steps: Finalize specifications of the OFDM system for specific applications. Decide the hardware to be used according to the specifications and availability. Start creating the Verilog code and Verilog test bench for OFDM transmitter. Start creating the Verilog code Verilog test bench for OFDM receiver. Verification and functional simulation of the Verilog code designed for the system Verify OFDM system on hardware and check out for the specifications sets in the first step. SIMULATION RESULTS: The Verilog HDL code for OFDM system is simulated using the Xilinx Simulator. The Figure given below taken from Xilinx simulator shows that the input signal applied at the front end of the transmitter is properly received at the next end of the receiver. The output bit stream received should be exactly same as that of the input bit stream since the applied signal passes through the transmitter block and then through the receiver block. The resource utilization in percentage from available device resources is shown in the tables given below. Fig. 4 Simulation Results Table1. Device Utilization Summary Number of Slice LUTs 47% Number of bonded IOBs 82% Number of DSP48A1s 93% Timing Constraint: Default path analysis Delay: ns (Levels of Logic = 52) Total: ns (37.147ns logic, ns route) 63:3%logic; 36:7%route Birangal U. M, Askhedkar A. R IJSRE Volume 3 Issue 10 October 2015 Page 4567

5 Table 2 Cell Usage BELS GND 1 1 LUT LUT2 490 LUT LUT4 397 LUT5 150 LUT6 549 MUXCY 3251 MUXF5 83 VCC 1 XORCY 3851 IO Buffers 192 IBUF 96 OBUF 96 DSPS 30 DPS48A1 30 Hardware Overview: For OFDM Transceiver system implementation we have used the FPGA chip. The implementation of such medium-complex systems on FPGA is better than that of using the general purpose processors in terms of speed and ASIC in terms of cost. Field programmable gate array supports the implementation of relatively large logic circuits. It consist of three main sources namely Logic Blocks, I/O blocks and Interconnection Wires or Switches. For this system design on hardware we are using spartan6 FPGA device. CONCLUSIONS: OFDM Transceiver is designed and implemented on Spartan 6 Kit. The system designed is verified using the Xilinx 14.4 Simulator and Spartan development board kit. From results it is clear that the designed system on hardware is error free. Designed System can be used for actual transmission which requires the RF front-ends at the transmitter side as well as at the receiver side along with FPGA. This design is helpful for transmit the data and receive the data. Birangal U. M, Askhedkar A. R IJSRE Volume 3 Issue 10 October 2015 Page 4568

6 REFERENCES: 1. Akash Mecwan, Dhaval Shah. Implementation of OFDM Transceiver on FPGA", Nirma University International Conference on Engineering, Volume 2, Issue 2, April 2013, IEEE. 2. Sugondo Hadiyoso, Rina P. Astuti, Iswahyudi Hidayat, Design of an FPGA-Based OFDM- STBC Transceiver for WiMAX e Standard 2nd International Conference on Information and Communication Technology, 2014, IEEE. 3. K. Srinandhini, V. Vaithianathan, FPGA Implementation of MIMO-OFDM Transceiver." International Conference on Communication and Signal Processing, 2014, IEEE. 4. Nasreen Mev, Brig. R. M. Khaire, Implementation of OFDM Transmitter and Receiver using FPGA. International Journal of Soft Computing and Engineering, Volume-3, Issue-3, July 2013, IJSCE. 5. Yojna Bellada, Shilpa Shrigiria, Simulation and Modelling of OFDM Systems and Implementation on FPGA", International Journal of Current Engineering and Technology, Special Issue1, 2013, NCWSE. 6. Pratibha Mane, Varsha Thombare, Monali Mhaske, Prof. R. R. Bhambare, Implementation of n OFDM Transmitter and Receiver using FPGA." International Journal of Emerging Technology and Advanced Engineering, Volume 4, Issue 4, April 2014, IJETAE. 7. Mario Vestias, Helena Sarmento, FPGA Implementation of IEEE c Receiver", IEEE 16th International Symposium, 2012, IEEE. 8. C.J. Youn, H.Y. Rha, J.H. Kim, J.S. Choe, D.J. Kim, Y.H. Kwon, E.S. Nam., Real-time FPGA Transmitter and Receiver for Coherent Optical OFDM", The 12th International Conference on Optical Internet Proceedings, 2014, IEEE. Birangal U. M, Askhedkar A. R IJSRE Volume 3 Issue 10 October 2015 Page 4569