Quick View. Analog input time. Oversampling & pulse density modulation fs (sampling rate) >> fn (Nyquist rate)
|
|
- Theodora Daniel
- 5 years ago
- Views:
Transcription
1 SigmaDelta ADC
2 Quick View Analog input time Oversampling & pulse density modulation sampling rate >> fn Nyquist rate One bit digital output Higher input > more 's Lower input > more 's Oversampling ratio r /fn r 8, 6, 3,...,56
3 Quantiation Error in ADC Digital output Analog input Δ Δ 3Δ quantiation error e / / q eq deq not a function of sampling rate Quantiation error noise digital representation of sampling points
4 Quantiation Error in Oversampling ' As sampling rate increases,. no change in power. more possibility of ero error points ero error points In case of infinite oversampling, We have all transition points crossing code boundaries all ero error points. Sufficient information to recover original analog input > recall Nyquist theorem
5 Spectrum of Sampled Quantiation Noise quantied level target Suppose a pitcher throws a ball into target in every Ts. Assuming probability is uniformly distributed in target one. target one lowest freq. component DC Ts Ts 3Ts 4Ts 5Ts 6Ts 7Ts Nf : noise spectrum target one highest freq. component / Ts Ts 3Ts 4Ts 5Ts 6Ts 7Ts / / Nyquist sampler : fmax / Quantiation noise power, Δ²/, is uniformly distributed from DC to /
6 Noise Reduction by Oversampling Fact Quantiation noise powerδ²/ is independent of sampling rate. Δ²/ is uniformly distributed from DC to /. Total noise is fixed. Nf ' '/ / / '/ As sampling rate increases from to ', noise floor decreases by the factor of /' Comparison of Inband Noise Power NyquistRate Sampling vs. Oversampling ' fn/fb '/ filtered out fn/ fn/ filtered out '/ Noise power in oversampling fn / fn / df ' fn ' r r : oversampling ratio ratio of sampling rate to Nyquist rate
7 Effect on SNR Recall peak SNR db 6.0m.76 in db m : resolution PeakSNR : ratio between the maximum input power and quantiation noise power Every x oversampling decreases noise power by half > 3dB increase in SNR > 4x oversampling effectively increases resolution of bit. original peak SNR db 0 log r 6.0m.76 in db For 3bit SNR increase, 644³ oversampling needed > inefficient!!
8 Oversampled Signal Spectrum PSD Nyquist sampling PSD fb fn/ fn f Oversamling ratior4 fb 4fN f Specification released for analog antialiasing filter at input stage r ~ ⁿ < r < 6 : mild oversampling 6 < r < 56 heavy oversampling
9 xt x p t Predictive Oversampling Delta Modulator comparator integrator D Q bit quantier yn bit DAC Vref Vref equivalent model xn x p t quantier xn : comparator also performs sample and hold yn No input change xpt tracks xt Demodulator finds xpt Integration converts level to multilevel on xpt
10 Delta Modulator xn x p t Modulator Demodulator yn yn same integrator x p t LPF xt X E quantier Y Y X Y E Y X E STF X NTF E Signal transfer function : Noise transfer function : STF NTF Mathematical linear model If Y inputted to demodulator, recoverd signal X E Delta modulation equally treats signal and noise.
11 Stability Issue Overload : Large input signal changes faster than modulator can track. Overload causes phase lag. Modulator may be unstable in case of overloading.
12 xt x p t xt Stability Issue x p t Filter yn π A criterion for stability π θ NTF e j π dθ < ~.5 xt x p t xt x p t 80 phase lag > positive feedback!! > can be unstable Once modulator enters unstable condition, it stays unstable even if input is ero. Extensive simulation is required for overloading case. If filter is st order, maximum phase shift is 90. > Unconditionally stable
13 Development of Σ Modulator from Modulator Delta modulator Start from Delta modulator X Modulator E Y Demodulator LPF X E Integrator in demodulator moved to input stage of modulator X Y LPF X The term 'sigma' is added due to an additional integrator at the input stage. SigmaDelta modulator Two Integrators in modulator merged X Modulator E Y LPF Demodulator X
14 LowFrequency Error Elimination Concept Error injected before integrator Error injected after integrator error In A Out In A error B Out At steady state : Case In, error 0. > A 0, Out. Case In, error 0. > A 0, Out. Case 3 In, error k > A 0, Out k Out tracks error Σ At steady state : Case In, error 0. > A 0, B 0.9, Out Case In, error 0. > A 0, B 0.8, Out Case 3 In, error k > A 0, B k, Out Error is not seen at Out Integrator output can be anything to make it's input be ero. > Out becomes In regardless of the error injection. Since this system is a linear system, output component of frequency fo is generated only by the fo components of the inputs. If the input band of interest is small, a low pass filtering of the output results in erroreliminated recovery of the input signal.
15 storder Σ Modulator Modulator Demodulator X E Y LPF X Demodulation can be done by only LPF. Since modulator has feedback loop, it still has stability problem. Y { X Y } E Y X E STF X NTF E STF NTF : simple delay : highpass Noise Shaping Modulation dose not affect signal xt Noise component is highpass filtered. Highpass shaped noise can be suppressed by LPF in demodulator.
16 Spectrum of Output PSD signal noiseoversampling with noise shaping noisenyquist noiseoversampling 0 fn/ inband noise after oversampling with noise shaping /
17 Waveforms of Signals in Modulator Modulator Demodulator xt at bt yt LPF xt xt at 0 quantier threshold bt yt acquisition period more s for high xt more s for low xt
18 Modulator Output for Various Cases DC input AC input Unstable long series of and
19 Measurements of Modulator Performance signal noise shaping curve In log scale plot slope signal frequency band Apply various amplitudes of input signal Sequence of SNR measurement Apply a pure sinusoid for input Get a large number of output samples ~65536 Apply FFT to data Signal power : square of the signal component Noise power : sum of squares of all noise components in signal frequency band SNR ratio of the two powers
20 db & dbm db : 0logratio of two power quantities dbm : 0logpower/mW > refers absolute value ex mw0dbm, 0mW0dBm, 00mW0dBm, W30dBm [ ]dbm [ ]dbm [ ]db [ ]dbm [ ]db [ ]dbm Conversion of voltage quantity to dbm Power V² with R assumed to be 50 ex Input sinusoid of 63.mVpp xt 3.6mV*sinwt power xt ²,rms/50Ω {3.6mV²/}/50Ω 0.0mW 0log0.0mW/mW 0dBm ex Input sinusoid of Vpp <Vin,max ±V power V²//50Ω 0mW 0log0mW/mW 0dBm
21 SNR Representation with Relative Voltage Input SNR db overload Peak SNR 0 Dynamic range DR 0 VindB Xaxis : Normalied power with R 0 on Xaxis : maximum input voltage Arbitrary input Va on Xaxis : 0logVa/Vin DR power of max sinusoidal input power of sinusoidal input at SNR Since slope, DR can be calculated by extrapolated peak SNR
22 Noise Shaping of Higher Order Modulator Y STF X NTF E STF simple delay,, NTF : st order : nd order 3 n : 3rd order : nth order, 3,,... or high pass filter or low pass filter which covers signal band PSD Nyquist 4thorder 3rdorder ndorder Stability decreases as order goes higher oversampling with storder noise shaping fn/ only oversampling /
23 InBand Noise Power as a Function of Order NTF j πfts n NTF f e { NTF s sinπfts n jπfts jπfts jπfts n e e e } n n : order e j πfts jπfts n { e jsin πfts} Total noise power in signal band fb fn / NTF s df fts sin π fb fn / fn / fn / πfts n n df n n fn / n n n π n π fn f df n n n n fn / n π Qr n n r df fn assuming >> fn/
24 st order nd order SNR Improvement vs. Order n π Noise Power Qr n n r fn noise power π 36 r 4 π 60 5 r 3 SNR increase as r doubled x8 9dB x3 5dB effective increase in resolution.5bit.5bit 3rd order 6 π 84 7 r x8 db 3.5bit r
25 Choice of Order and Oversampling Ratio maximum rms power of sinusoidal input SNR when maximum input is applied n π n r n 3 n r n π n : level quantiation assumed r 3 n /n π SNR n Ex Implementation of 6bit resolution using nd order ΣΔ modulator From peak SNR db 6.0m.76 in db With m6, required peaksnr 98dB r n π 98dB /5 48 > choose r64
26 Design of nd Order ΣΔModulator X b b b3 E I c I c Y a a STF and NTF can be designed independently. I, I : integrator delaying or nondelaying integrator is appropriately chosen for each Ii If both nondelaying and delaying integrators are used, nondelaying integrator should be used at the first stage. ai, bi, ci : scaling factor
27 Example Realie ndorder ΣΔ modulator with NTF I X c b a c b a b3 E I X X Y a Y X b X X c Y a X b X E X b X c Y 3 E a c a c a c c X a c a c a c c b c b b b c b c c b Y STF NTF For simplicity, internal scaling factor cc case STF then aabbb3 case STF then aab, bb30
28 STF and NTF cannot be designed independently. Simpler Implementation X c a I c a I E Y H.W. Using above model, try to design c,c,a,a and find STF for following cases case case case 3 case 4 NTF I I NTF I I NTF I I Case 5 : case with this model NTF I I X c I c I Y E.... a a
29 NTF Pole/Zero Optimiation As freq increases All eros at All poles at 0 Maximum gain usually occurs at As poles go farther from, stability improves. NTFdB Lower NTF gain in signal band Smaller outofband NTF gain for better stability freq
30 STF As freq increases 3 c a b b All poles at 0 Typically STF has the same poles in NTF. STFdB 0dB STF has Low pass characteristic Further filtering performed by post processing Signal band freq
31 General Structures R. Schreier, G. Temes, "Understanding DeltaSigma Data Converters" CRFF
32 MultistAge noise SHapingMASH Structure E X E E3 Y Y Y3 Y 3 3 E E Y E E Y E X Y 3 Y Y Y Y E X Each stage : st order > unconditionally stable Input of stage : X Input of stage : quantiation noise of stage Input of stage 3 : quantiation noise of stage > whitenoiselike quantiation error even with harmonic distortion noise of last stage remains
33 Practical Issues of MASH X E Y E Y {,} {,} {,} {,0,} Y {7,5,3,,,3,5,7} E3 Y3 {,0,} {4,,0,,4} The integrator of each stage performs analoglevel operation. Integrating leakage due to the imperfections of circuit and mismatches among integrators causes failure in exact cancellation of noise at the output stage. Increased output bit raises implementation complexity. 8level needed at output expression for three stage > 3bit modulator
34 Dynamic Range Scaling b ci x co a Integrator output should be limited to guarantee linear operation. To scale down with the ratio of k b/k ci/k x' k*co a/k Dynamic range of x' reduced by k with overall output not changed
35 Design with Simulink ABCD Matrix ABCD matrix : can describe any linear system. X X X3 X4 Redefine ABCDbased description U V Q Y k v k u B k Ax k x k v k u D k Cx k y To confine state vector, dynamic range scaling should be done with ABCD description.
36 Σ ADC Vin Σ modulator bit Decimation n Filter Channel Filter n Digital output fn Key features Oversampling Noise shaping Decimation Filter Channel Filter High resolution upto 4bits Excellent Linearity Quantiation noise reduction Relaxes analog antialiasing filter requirements Low power Input signal should be bandlimited for sufficient oversampling. No sample & hold > Embedded in modulator Wide applications Instrumentation, Voice band and Audio, Digital video, Medical Devices Wireless communication using band pass Σ modulator
37 Decimation & Interpolation Ex, r4 original Decimation Reduction of sampling rate by r digital LPF reduction of sampling rate by r after LP filtering /r /r /r /r /r original Interpolation Increase sampling rate by r before LP filtering increase sampling rate by r digital LPF /r /r /r result /r /r
38 Decimation & Interpolation Example r Original analog signal Decimation Sampled signal Low pass filtered result Reduce data rate by Interpolation Add one 0 between two data increasing data rate by Low pass filtered result
39 Decimation Filter Simplest implementation Comb filtersinc filter H r N r i r i 0 r N : number of cascading r : decimation ratio N Antialiasing filter All coefficients are unity > easily implemented Hardware efficient Set order of filter r to make ero at the multiples of /r Largerate down conversion ratio Used in the first stage of decimator filter Large passband drop > Set passband edge of comb filter to be at least times larger than passband edge.
40 Frequency Response of Comb Filter 0 / sin / sin / / / / / / N N f j f j f j r f j r f j r f j f fr r e e e e e e r f H π π π π π π π π Hf ero at f integer multiples of /r Ex 6tab comb filter for rate down conversion by 6 Normalied frequency to /r center frequencies of images when down conversion
41 Conceptual Bitto7 Bit Conversion Before Decimation averaging of 6 consecutive bits bit word bit word bit word bit word To prevent overflow in case of all 's, bit is additionally used.
42 Implementation of Comb Filter Separation of denominator and numerator Denominator : high sampling rate Numerator : low sampling rate H r N r i r i 0 r averaging r bits N Division by r can be skipped by multibit expression Ex Suppose 6bit averaging average value 9/6 extension to 4bit 00 <same as simple addition Ex Implementation of 64 3 with /64 decimation /64 switching /64 /64 /64 In Out 64 Word length required to avoid overflow N log r i 3log 64 9bits i : word length of input
43 H H e j πf sinc f sinc f with normalied to Half Decimation sinc f sin πf πf In / switching Out After decimation by half noise noise signal filtered noise / /4 /4 / /4 /4 noise added to signal when down sampled cos/ x cos/ > DC term image sampling overlapped with signal
44 Cascading of Half Decimation Power Efficient / switching / /4 switching /4 /8 switching /8 /6 switching In Deci filter Deci filter Deci filter3 Deci filter4 Out Deci filter Deci filter Deci filter3 Deci filter4 / / /4 /4 /8 /8 /6 /6 More complicated filter > more taps in FIR
45 Finite Impulse Response FIR Filter Simple compared to IIR filter No feedback Linear phase characteristic FIR filter is used for filtering out outofband noise. Conversion ratio is small : usually r4 or less Decimation also performed by r Higher order required Since multiplication coefficients are not unity, much more complicated than comb filter.
46 FIR Filter In a a a3 a ai : multiplication coefficient Out transition edge 0.45to0.55 /r Normalied frequency to /r
Summary Last Lecture
Interleaved ADCs EE47 Lecture 4 Oversampled ADCs Why oversampling? Pulse-count modulation Sigma-delta modulation 1-Bit quantization Quantization error (noise) spectrum SQNR analysis Limit cycle oscillations
More informationThe Case for Oversampling
EE47 Lecture 4 Oversampled ADCs Why oversampling? Pulse-count modulation Sigma-delta modulation 1-Bit quantization Quantization error (noise) spectrum SQNR analysis Limit cycle oscillations nd order ΣΔ
More informationAnalog-to-Digital Converters
EE47 Lecture 3 Oversampled ADCs Why oversampling? Pulse-count modulation Sigma-delta modulation 1-Bit quantization Quantization error (noise) spectrum SQNR analysis Limit cycle oscillations nd order ΣΔ
More informationSummary Last Lecture
EE47 Lecture 5 Pipelined ADCs (continued) How many bits per stage? Algorithmic ADCs utilizing pipeline structure Advanced background calibration techniques Oversampled ADCs Why oversampling? Pulse-count
More informationEE247 Lecture 26. This lecture is taped on Wed. Nov. 28 th due to conflict of regular class hours with a meeting
EE47 Lecture 6 This lecture is taped on Wed. Nov. 8 th due to conflict of regular class hours with a meeting Any questions regarding this lecture could be discussed during regular office hours or in class
More informationCascaded Noise-Shaping Modulators for Oversampled Data Conversion
Cascaded Noise-Shaping Modulators for Oversampled Data Conversion Bruce A. Wooley Stanford University B. Wooley, Stanford, 2004 1 Outline Oversampling modulators for A/D conversion Cascaded noise-shaping
More informationINF4420. ΔΣ data converters. Jørgen Andreas Michaelsen Spring 2012
INF4420 ΔΣ data converters Spring 2012 Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no) Outline Oversampling Noise shaping Circuit design issues Higher order noise shaping Introduction So far we have considered
More informationTelecommunication Electronics
Politecnico di Torino ICT School Telecommunication Electronics C5 - Special A/D converters» Logarithmic conversion» Approximation, A and µ laws» Differential converters» Oversampling, noise shaping Logarithmic
More informationSystem on a Chip. Prof. Dr. Michael Kraft
System on a Chip Prof. Dr. Michael Kraft Lecture 5: Data Conversion ADC Background/Theory Examples Background Physical systems are typically analogue To apply digital signal processing, the analogue signal
More informationCHAPTER. delta-sigma modulators 1.0
CHAPTER 1 CHAPTER Conventional delta-sigma modulators 1.0 This Chapter presents the traditional first- and second-order DSM. The main sources for non-ideal operation are described together with some commonly
More informationECE 627 Project: Design of a High-Speed Delta-Sigma A/D Converter
ECE 627 Project: Design of a High-Speed Delta-Sigma A/D Converter Brian L. Young youngbr@eecs.oregonstate.edu Oregon State University June 6, 28 I. INTRODUCTION The goal of the Spring 28, ECE 627 project
More informationSIGMA-DELTA CONVERTER
SIGMA-DELTA CONVERTER (1995: Pacífico R. Concetti Western A. Geophysical-Argentina) The Sigma-Delta A/D Converter is not new in electronic engineering since it has been previously used as part of many
More informationMultirate DSP, part 3: ADC oversampling
Multirate DSP, part 3: ADC oversampling Li Tan - May 04, 2008 Order this book today at www.elsevierdirect.com or by calling 1-800-545-2522 and receive an additional 20% discount. Use promotion code 92562
More informationChapter 2: Digitization of Sound
Chapter 2: Digitization of Sound Acoustics pressure waves are converted to electrical signals by use of a microphone. The output signal from the microphone is an analog signal, i.e., a continuous-valued
More informationAdvanced AD/DA converters. ΔΣ DACs. Overview. Motivations. System overview. Why ΔΣ DACs
Advanced AD/DA converters Overview Why ΔΣ DACs ΔΣ DACs Architectures for ΔΣ DACs filters Smoothing filters Pietro Andreani Dept. of Electrical and Information Technology Lund University, Sweden Advanced
More informationThe Research and Design of An Interpolation Filter Used in an Audio DAC
Available online at www.sciencedirect.com Procedia Environmental Sciences 11 (011) 387 39 The Research and Design of An Interpolation Filter Used in an Audio DAC Chang-Zheng Dong, Tie-Jun Lu, Zong-Min
More informationEE247 Lecture 26. EE247 Lecture 26
EE247 Lecture 26 Administrative EE247 Final exam: Date: Mon. Dec. 18 th Time: 12:30pm-3:30pm Location: 241 Cory Hall Extra office hours: Thurs. Dec. 14 th, 10:30am-12pm Closed book/course notes No calculators/cell
More informationAdvanced AD/DA converters. Higher-Order ΔΣ Modulators. Overview. General single-stage DSM. General single-stage DSM II ( 1
Advanced AD/DA converters Overview Higher-order single-stage modulators Higher-Order ΔΣ Modulators Stability Optimization of TF zeros Higher-order multi-stage modulators Pietro Andreani Dept. of Electrical
More informationBandPass Sigma-Delta Modulator for wideband IF signals
BandPass Sigma-Delta Modulator for wideband IF signals Luca Daniel (University of California, Berkeley) Marco Sabatini (STMicroelectronics Berkeley Labs) maintain the same advantages of BaseBand converters
More informationCOURSE OUTLINE. Introduction Signals and Noise Filtering: LPF1 Constant-Parameter Low Pass Filters Sensors and associated electronics
Sensors, Signals and Noise COURSE OUTLINE Introduction Signals and Noise Filtering: LPF Constant-Parameter Low Pass Filters Sensors and associated electronics Signal Recovery, 207/208 LPF- Constant-Parameter
More informationSignal processing preliminaries
Signal processing preliminaries ISMIR Graduate School, October 4th-9th, 2004 Contents: Digital audio signals Fourier transform Spectrum estimation Filters Signal Proc. 2 1 Digital signals Advantages of
More informationLecture 390 Oversampling ADCs Part I (3/29/10) Page 390-1
Lecture 390 Oversampling ADCs Part I (3/29/0) Page 390 LECTURE 390 OVERSAMPLING ADCS PART I LECTURE ORGANIZATION Outline Introduction Deltasigma modulators Summary CMOS Analog Circuit Design, 2 nd Edition
More informationMultirate Digital Signal Processing
Multirate Digital Signal Processing Basic Sampling Rate Alteration Devices Up-sampler - Used to increase the sampling rate by an integer factor Down-sampler - Used to increase the sampling rate by an integer
More informationLecture 3 Review of Signals and Systems: Part 2. EE4900/EE6720 Digital Communications
EE4900/EE6720: Digital Communications 1 Lecture 3 Review of Signals and Systems: Part 2 Block Diagrams of Communication System Digital Communication System 2 Informatio n (sound, video, text, data, ) Transducer
More informationChapter-2 SAMPLING PROCESS
Chapter-2 SAMPLING PROCESS SAMPLING: A message signal may originate from a digital or analog source. If the message signal is analog in nature, then it has to be converted into digital form before it can
More informationESE 531: Digital Signal Processing
ESE 531: Digital Signal Processing Lec 11: February 20, 2018 Data Converters, Noise Shaping Lecture Outline! Review: Multi-Rate Filter Banks " Quadrature Mirror Filters! Data Converters " Anti-aliasing
More informationMASH 2-1 MULTI-BIT SIGMA-DELTA MODULATOR FOR WLAN L 2 ( ) ( ) 1( 1 1 1
MASH 2- MULTI-BIT SIGMA-DELTA MODULATOR FOR WLAN Yu hang, Ning Xie, Hui Wang and Yejun He College of Information Engineering, Shenzhen University, Shenzhen, Guangdong 58060, China kensouren@yahoo.com.cn
More informationEEE 309 Communication Theory
EEE 309 Communication Theory Semester: January 2016 Dr. Md. Farhad Hossain Associate Professor Department of EEE, BUET Email: mfarhadhossain@eee.buet.ac.bd Office: ECE 331, ECE Building Part 05 Pulse Code
More informationEE247 Lecture 26. EE247 Lecture 26
EE247 Lecture 26 Administrative Final exam: Date: Tues. Dec. 13 th Time: 12:3pm-3:3pm Location: 285 Cory Office hours this week: Tues: 2:3p to 3:3p Wed: 1:3p to 2:3p (extra) Thurs: 2:3p to 3:3p Closed
More informationECE 6560 Multirate Signal Processing Chapter 11
ultirate Signal Processing Chapter Dr. Bradley J. Bauin Western ichigan University College of Engineering and Applied Sciences Department of Electrical and Computer Engineering 903 W. ichigan Ave. Kalamaoo
More information1. Find the magnitude and phase response of an FIR filter represented by the difference equation y(n)= 0.5 x(n) x(n-1)
Lecture 5 1.8.1 FIR Filters FIR filters have impulse responses of finite lengths. In FIR filters the present output depends only on the past and present values of the input sequence but not on the previous
More informationAN ABSTRACT OF THE THESIS OF. Title: Effects and Compensation of the Analog Integrator Nonidealities in Dual- GAL- C. Temes
AN ABSTRACT OF THE THESIS OF Yaohua Yang for the degree of Master of Science in Electrical & Computer Engineering presented on February 20, 1993. Title: Effects and Compensation of the Analog Integrator
More informationAdvanced AD/DA converters. Higher-Order ΔΣ Modulators. Overview. General single-stage DSM II. General single-stage DSM
Advanced AD/DA converters Overview Higher-order single-stage modulators Higher-Order ΔΣ Modulators Stability Optimization of TF zeros Higher-order multi-stage modulators Pietro Andreani Dept. of Electrical
More informationEE247 Lecture 26. EE247 Lecture 26
EE247 Lecture 26 Administrative Project submission: Project reports due Dec. 5th Please make an appointment with the instructor for a 15minute meeting on Monday Dec. 8 th Prepare to give a 3 to 7 minute
More informationLecture Schedule: Week Date Lecture Title
http://elec3004.org Sampling & More 2014 School of Information Technology and Electrical Engineering at The University of Queensland Lecture Schedule: Week Date Lecture Title 1 2-Mar Introduction 3-Mar
More informationAN ABSTRACT OF THE DISSERTATION OF
AN ABSTRACT OF THE DISSERTATION OF Ruopeng Wang for the degree of Doctor of Philosophy in Electrical and Computer Engineering presented on June 5, 006. Title: A Multi-Bit Delta Sigma Audio Digital-to-Analog
More information! Multi-Rate Filter Banks (con t) ! Data Converters. " Anti-aliasing " ADC. " Practical DAC. ! Noise Shaping
Lecture Outline ESE 531: Digital Signal Processing! (con t)! Data Converters Lec 11: February 16th, 2017 Data Converters, Noise Shaping " Anti-aliasing " ADC " Quantization "! Noise Shaping 2! Use filter
More informationMultirate DSP, part 1: Upsampling and downsampling
Multirate DSP, part 1: Upsampling and downsampling Li Tan - April 21, 2008 Order this book today at www.elsevierdirect.com or by calling 1-800-545-2522 and receive an additional 20% discount. Use promotion
More informationSignals and Filtering
FILTERING OBJECTIVES The objectives of this lecture are to: Introduce signal filtering concepts Introduce filter performance criteria Introduce Finite Impulse Response (FIR) filters Introduce Infinite
More informationPresented at the 108th Convention 2000 February Paris, France
Direct Digital Processing of Super Audio CD Signals 5102 (F - 3) James A S Angus Department of Electronics, University of York, England Presented at the 108th Convention 2000 February 19-22 Paris, France
More informationLinear Time-Invariant Systems
Linear Time-Invariant Systems Modules: Wideband True RMS Meter, Audio Oscillator, Utilities, Digital Utilities, Twin Pulse Generator, Tuneable LPF, 100-kHz Channel Filters, Phase Shifter, Quadrature Phase
More informationAnswers to Problems of Chapter 4
Answers to Problems of Chapter 4 The answers to the problems of this chapter are based on the use of MATLAB. Thus, if the readers have some prior elementary knowledge on it, it will be easier for them
More informationChapter 2 DDSM and Applications
Chapter DDSM and Applications. Principles of Delta-Sigma Modulation In order to explain the concept of noise shaping in detail, we start with a stand-alone quantizer (see Fig..a) with a small number of
More informationEECS 452 Practice Midterm Exam Solutions Fall 2014
EECS 452 Practice Midterm Exam Solutions Fall 2014 Name: unique name: Sign the honor code: I have neither given nor received aid on this exam nor observed anyone else doing so. Scores: # Points Section
More informationOne-Bit Delta Sigma D/A Conversion Part I: Theory
One-Bit Delta Sigma D/A Conversion Part I: Theory Randy Yates mailto:randy.yates@sonyericsson.com July 28, 2004 1 Contents 1 What Is A D/A Converter? 3 2 Delta Sigma Conversion Revealed 5 3 Oversampling
More information6.976 High Speed Communication Circuits and Systems Lecture 17 Advanced Frequency Synthesizers
6.976 High Speed Communication Circuits and Systems Lecture 17 Advanced Frequency Synthesizers Michael Perrott Massachusetts Institute of Technology Copyright 2003 by Michael H. Perrott Bandwidth Constraints
More informationDesign of Bandpass Delta-Sigma Modulators: Avoiding Common Mistakes
Design of Bandpass Delta-Sigma Modulators: Avoiding Common Mistakes R. Jacob Baker and Vishal Saxena Department of Electrical and Computer Engineering Boise State University 1910 University Dr., ET 201
More informationESE 531: Digital Signal Processing
ESE 531: Digital Signal Processing Lec 12: February 21st, 2017 Data Converters, Noise Shaping (con t) Lecture Outline! Data Converters " Anti-aliasing " ADC " Quantization " Practical DAC! Noise Shaping
More informationOversampling Converters
Oversampling Converters Behzad Razavi Electrical Engineering Department University of California, Los Angeles Outline Basic Concepts First- and Second-Order Loops Effect of Circuit Nonidealities Cascaded
More informationECE 5650/4650 Exam II November 20, 2018 Name:
ECE 5650/4650 Exam II November 0, 08 Name: Take-Home Exam Honor Code This being a take-home exam a strict honor code is assumed. Each person is to do his/her own work. Bring any questions you have about
More informationEEE 309 Communication Theory
EEE 309 Communication Theory Semester: January 2017 Dr. Md. Farhad Hossain Associate Professor Department of EEE, BUET Email: mfarhadhossain@eee.buet.ac.bd Office: ECE 331, ECE Building Types of Modulation
More informationEE247 Lecture 24. EE247 Lecture 24
EE247 Lecture 24 Administrative EE247 Final exam: Date: Wed. Dec. 15 th Time: -12:30pm-3:30pm- Location: 289 Cory Closed book/course notes No calculators/cell phones/pdas/computers Bring one 8x11 paper
More informationMusic 270a: Fundamentals of Digital Audio and Discrete-Time Signals
Music 270a: Fundamentals of Digital Audio and Discrete-Time Signals Tamara Smyth, trsmyth@ucsd.edu Department of Music, University of California, San Diego October 3, 2016 1 Continuous vs. Discrete signals
More informationCS3291: Digital Signal Processing
CS39 Exam Jan 005 //08 /BMGC University of Manchester Department of Computer Science First Semester Year 3 Examination Paper CS39: Digital Signal Processing Date of Examination: January 005 Answer THREE
More informationDesign Low Noise Digital Decimation Filter For Sigma-Delta-ADC
International Journal of scientific research and management (IJSRM) Volume 3 Issue 6 Pages 352-359 25 \ Website: www.ijsrm.in ISSN (e): 232-348 Design Low Noise Digital Decimation Filter For Sigma-Delta-ADC
More informationDSP Based Corrections of Analog Components in Digital Receivers
fred harris DSP Based Corrections of Analog Components in Digital Receivers IEEE Communications, Signal Processing, and Vehicular Technology Chapters Coastal Los Angeles Section 24-April 2008 It s all
More informationRELAXED TIMING ISSUE IN GLOBAL FEEDBACK PATHS OF UNITY- STF SMASH SIGMA DELTA MODULATOR ARCHITECTURE
RELAXED TIMING ISSUE IN GLOBAL FEEDBACK PATHS OF UNITY- STF SMASH SIGMA DELTA MODULATOR ARCHITECTURE Mehdi Taghizadeh and Sirus Sadughi Department of Electrical Engineering, Science and Research Branch,
More information10 bit Delta Sigma D/A Converter with Increased S/N ratio Using Compact Adder Circuits
International Journal of Scientific & Engineering Research, Volume 4, Issue 8, August 2013 10 bit Delta Sigma D/A Converter with Increased S/N ratio Using Compact Adder Circuits Jyothish Chandran G, Shajimon
More informationChapter 3 Data Transmission COSC 3213 Summer 2003
Chapter 3 Data Transmission COSC 3213 Summer 2003 Courtesy of Prof. Amir Asif Definitions 1. Recall that the lowest layer in OSI is the physical layer. The physical layer deals with the transfer of raw
More informationFourier Transform Analysis of Signals and Systems
Fourier Transform Analysis of Signals and Systems Ideal Filters Filters separate what is desired from what is not desired In the signals and systems context a filter separates signals in one frequency
More informationOutline. Discrete time signals. Impulse sampling z-transform Frequency response Stability INF4420. Jørgen Andreas Michaelsen Spring / 37 2 / 37
INF4420 Discrete time signals Jørgen Andreas Michaelsen Spring 2013 1 / 37 Outline Impulse sampling z-transform Frequency response Stability Spring 2013 Discrete time signals 2 2 / 37 Introduction More
More informationEE247 Lecture 27. EE247 Lecture 27
EE247 Lecture 27 Administrative EE247 Final exam: Date: Wed. Dec. 19 th Time: 12:30pm-3:30pm Location: 70 Evans Hall Extra office hours: Thurs. Dec. 13 th, 10:am2pm Closed course notes/books No calculators/cell
More informationINTRODUCTION TO DELTA-SIGMA ADCS
ECE37 Advanced Analog Circuits Lecture INTRODUCTION TO DELTA-SIGMA ADCS Richard Schreier richard.schreier@analog.com Trevor Caldwell trevor.caldwell@utoronto.ca Course Goals Deepen understanding of CMOS
More informationAnalog and Telecommunication Electronics
Politecnico di Torino Electronic Eng. Master Degree Analog and Telecommunication Electronics D1 - A/D/A conversion systems» Sampling, spectrum aliasing» Quantization error» SNRq vs signal type and level»
More informationDigital Filtering: Realization
Digital Filtering: Realization Digital Filtering: Matlab Implementation: 3-tap (2 nd order) IIR filter 1 Transfer Function Differential Equation: z- Transform: Transfer Function: 2 Example: Transfer Function
More informationPart B. Simple Digital Filters. 1. Simple FIR Digital Filters
Simple Digital Filters Chapter 7B Part B Simple FIR Digital Filters LTI Discrete-Time Systems in the Transform-Domain Simple Digital Filters Simple IIR Digital Filters Comb Filters 3. Simple FIR Digital
More informationDigital Processing of Continuous-Time Signals
Chapter 4 Digital Processing of Continuous-Time Signals 清大電機系林嘉文 cwlin@ee.nthu.edu.tw 03-5731152 Original PowerPoint slides prepared by S. K. Mitra 4-1-1 Digital Processing of Continuous-Time Signals Digital
More informationLecture Outline. ESE 531: Digital Signal Processing. Anti-Aliasing Filter with ADC ADC. Oversampled ADC. Oversampled ADC
Lecture Outline ESE 531: Digital Signal Processing Lec 12: February 21st, 2017 Data Converters, Noise Shaping (con t)! Data Converters " Anti-aliasing " ADC " Quantization "! Noise Shaping 2 Anti-Aliasing
More informationAnalog and Telecommunication Electronics
Politecnico di Torino - ICT School Analog and Telecommunication Electronics D5 - Special A/D converters» Differential converters» Oversampling, noise shaping» Logarithmic conversion» Approximation, A and
More informationDigital Processing of
Chapter 4 Digital Processing of Continuous-Time Signals 清大電機系林嘉文 cwlin@ee.nthu.edu.tw 03-5731152 Original PowerPoint slides prepared by S. K. Mitra 4-1-1 Digital Processing of Continuous-Time Signals Digital
More informationIslamic University of Gaza. Faculty of Engineering Electrical Engineering Department Spring-2011
Islamic University of Gaza Faculty of Engineering Electrical Engineering Department Spring-2011 DSP Laboratory (EELE 4110) Lab#4 Sampling and Quantization OBJECTIVES: When you have completed this assignment,
More informationOutline. EECS 3213 Fall Sebastian Magierowski York University. Review Passband Modulation. Constellations ASK, FSK, PSK.
EECS 3213 Fall 2014 L12: Modulation Sebastian Magierowski York University 1 Outline Review Passband Modulation ASK, FSK, PSK Constellations 2 1 Underlying Idea Attempting to send a sequence of digits through
More informationOn-Chip Implementation of Cascaded Integrated Comb filters (CIC) for DSP applications
On-Chip Implementation of Cascaded Integrated Comb filters (CIC) for DSP applications Rozita Teymourzadeh & Prof. Dr. Masuri Othman VLSI Design Centre BlokInovasi2, Fakulti Kejuruteraan, University Kebangsaan
More informationInterpolation by a Prime Factor other than 2 in Low- Voltage Low-Power DAC
Interpolation by a Prime Factor other than 2 in Low- Voltage Low-Power DAC Peter Pracný, Ivan H. H. Jørgensen, Liang Chen and Erik Bruun Department of Electrical Engineering Technical University of Denmark
More informationMichael F. Toner, et. al.. "Distortion Measurement." Copyright 2000 CRC Press LLC. <
Michael F. Toner, et. al.. "Distortion Measurement." Copyright CRC Press LLC. . Distortion Measurement Michael F. Toner Nortel Networks Gordon W. Roberts McGill University 53.1
More informationDigital Signal Processing. VO Embedded Systems Engineering Armin Wasicek WS 2009/10
Digital Signal Processing VO Embedded Systems Engineering Armin Wasicek WS 2009/10 Overview Signals and Systems Processing of Signals Display of Signals Digital Signal Processors Common Signal Processing
More informationLecture #6: Analog-to-Digital Converter
Lecture #6: Analog-to-Digital Converter All electrical signals in the real world are analog, and their waveforms are continuous in time. Since most signal processing is done digitally in discrete time,
More informationMODELING AND IMPLEMENTATION OF THIRD ORDER SIGMA-DELTA MODULATOR
MODELING AND IMPLEMENTATION OF THIRD ORDER SIGMA-DELTA MODULATOR Georgi Tsvetanov Tsenov 1, Snejana Dimitrova Terzieva 1, Peter Ivanov Yakimov 2, Valeri Markov Mladenov 1 1 Department of Theoretical Electrical
More informationAn Overview of Basic Concepts *
J. C. Candy Chapter 1 An Overview of Basic Concepts * 1.1 INTRODUCTION This chapter reviews the main properties of oversampling techniques that are useful for converting signals between analog and digital
More information6 Sampling. Sampling. The principles of sampling, especially the benefits of coherent sampling
Note: Printed Manuals 6 are not in Color Objectives This chapter explains the following: The principles of sampling, especially the benefits of coherent sampling How to apply sampling principles in a test
More informationDECIMATION FILTER FOR MULTISTANDARD WIRELESS RECEIVER SHEETAL S.SHENDE
DECIMATION FILTER FOR MULTISTANDARD WIRELESS RECEIVER SHEETAL S.SHENDE Abstract The demand for new telecommunication services requiring higher capacities, data rates and different operating modes have
More informationOn the Most Efficient M-Path Recursive Filter Structures and User Friendly Algorithms To Compute Their Coefficients
On the ost Efficient -Path Recursive Filter Structures and User Friendly Algorithms To Compute Their Coefficients Kartik Nagappa Qualcomm kartikn@qualcomm.com ABSTRACT The standard design procedure for
More informationTones. EECS 247 Lecture 21: Oversampled ADC Implementation 2002 B. Boser 1. 1/512 1/16-1/64 b1. 1/10 1 1/4 1/4 1/8 k1z -1 1-z -1 I1. k2z -1.
Tones 5 th order Σ modulator DC inputs Tones Dither kt/c noise EECS 47 Lecture : Oversampled ADC Implementation B. Boser 5 th Order Modulator /5 /6-/64 b b b b X / /4 /4 /8 kz - -z - I kz - -z - I k3z
More informationCMPT 318: Lecture 4 Fundamentals of Digital Audio, Discrete-Time Signals
CMPT 318: Lecture 4 Fundamentals of Digital Audio, Discrete-Time Signals Tamara Smyth, tamaras@cs.sfu.ca School of Computing Science, Simon Fraser University January 16, 2006 1 Continuous vs. Discrete
More informationBasic Concepts and Architectures
CMOS Sigma-Delta Converters From Basics to State-of of-the-art Basic Concepts and Architectures Rocío del Río, R Belén Pérez-Verdú and José M. de la Rosa {rocio,belen,jrosa}@imse.cnm.es KTH, Stockholm,
More informationSymbol Timing Recovery Using Oversampling Techniques
Symbol Recovery Using Oversampling Techniques Hong-Kui Yang and Martin Snelgrove Dept. of Electronics, Carleton University Ottawa, O KS 5B6, Canada Also with ortel Wireless etworks, Ottawa, Canada Email:
More informationContinuous vs. Discrete signals. Sampling. Analog to Digital Conversion. CMPT 368: Lecture 4 Fundamentals of Digital Audio, Discrete-Time Signals
Continuous vs. Discrete signals CMPT 368: Lecture 4 Fundamentals of Digital Audio, Discrete-Time Signals Tamara Smyth, tamaras@cs.sfu.ca School of Computing Science, Simon Fraser University January 22,
More informationSistemas de Aquisição de Dados. Mestrado Integrado em Eng. Física Tecnológica 2015/16 Aula 3-29 de Setembro
Sistemas de Aquisição de Dados Mestrado Integrado em Eng. Física Tecnológica 2015/16 Aula 3-29 de Setembro Aliasing Example fsig=101khz fsig=899 khz All sampled signals are equal! fsig=1101 khz 2 How to
More informationECEN 610 Mixed-Signal Interfaces
Spring 2014 S. Hoyos-ECEN-610 1 ECEN 610 Mixed-Signal Interfaces Sebastian Hoyos Texas A&M University Analog and Mixed Signal Group Oversampling ADC Spring 2014 S. Hoyos-ECEN-610 2 Spring 2014 S. Hoyos-ECEN-610
More informationExploring Decimation Filters
Exploring By Arash Loloee, Ph.D. An overview of decimation filters, along with their operation and requirements. Introduction Delta-sigma analog-to-digital converters (ADCs) are among the most popular
More informationFPGA Based Hardware Efficient Digital Decimation Filter for - ADC
International Journal of Soft Computing and Engineering (IJSCE) FPGA Based Hardware Efficient Digital Decimation Filter for - ADC Subir Kr. Maity, Himadri Sekhar Das Abstract This paper focuses on the
More informationA Triple-mode Sigma-delta Modulator Design for Wireless Standards
0th International Conference on Information Technology A Triple-mode Sigma-delta Modulator Design for Wireless Standards Babita R. Jose, P. Mythili, Jawar Singh *, Jimson Mathew * Cochin University of
More informationVery low- power Sampled- data Σ- Δ Architectures for wireline and wireless applications
F. Maloberti: "Very lowpower ampleddata Δ Architectures for wireline and wireless applications"; Proc. of nd IEEE International ymposium on Communications, Control and ignal Processing, ICCP 006, Marrakech,
More informationSMS045 - DSP Systems in Practice. Lab 1 - Filter Design and Evaluation in MATLAB Due date: Thursday Nov 13, 2003
SMS045 - DSP Systems in Practice Lab 1 - Filter Design and Evaluation in MATLAB Due date: Thursday Nov 13, 2003 Lab Purpose This lab will introduce MATLAB as a tool for designing and evaluating digital
More informationPYKC 27 Feb 2017 EA2.3 Electronics 2 Lecture PYKC 27 Feb 2017 EA2.3 Electronics 2 Lecture 11-2
In this lecture, I will introduce the mathematical model for discrete time signals as sequence of samples. You will also take a first look at a useful alternative representation of discrete signals known
More informationDigital Communication System
Digital Communication System Purpose: communicate information at certain rate between geographically separated locations reliably (quality) Important point: rate, quality spectral bandwidth requirement
More informationADVANCES in VLSI technology result in manufacturing
INTL JOURNAL OF ELECTRONICS AND TELECOMMUNICATIONS, 2013, VOL. 59, NO. 1, PP. 99 104 Manuscript received January 8, 2013; revised March, 2013. DOI: 10.2478/eletel-2013-0012 Rapid Prototyping of Third-Order
More informationDigital Communication System
Digital Communication System Purpose: communicate information at required rate between geographically separated locations reliably (quality) Important point: rate, quality spectral bandwidth, power requirements
More informationSubtractive Synthesis. Describing a Filter. Filters. CMPT 468: Subtractive Synthesis
Subtractive Synthesis CMPT 468: Subtractive Synthesis Tamara Smyth, tamaras@cs.sfu.ca School of Computing Science, Simon Fraser University November, 23 Additive synthesis involves building the sound by
More informationImproved offline calibration for DAC mismatch in low OSR Sigma Delta ADCs with distributed feedback
Improved offline calibration for DAC mismatch in low OSR Sigma Delta ADCs with distributed feedback Maarten De Bock, Amir Babaie-Fishani and Pieter Rombouts This document is an author s draft version submitted
More information