TO-247-3L Inner Circuit Product Summary C) RDS(on) Parameter Symbol Test Conditions Value Unit
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1 Silicon Carbide Power MOSFET N-CHANNEL ENHANCEMENT MODE TO-247-3L Inner Circuit Product Summary VDS C) RDS(on) 650V 110A 20mΩ Features Low On-Resistance Low Capacitance Avalanche Ruggedness Halogen Free, RoHS Compliant Applications SMPS / UPS / PFC EV Charging Station & Motor Drives Benefits Higher System Efficiency Parallel Device Convenience High Temperature Application High Frequency Operation Power Inverters & DC/DC Converters Solar/ Wind Renewable Energy Maximum Ratings (Tc=25 C) Parameter Symbol Test Conditions Value Unit Drain Source Voltage V DS, max V GS=0V, I DS=100µA 650 V Continuous Drain Current I D V GS=20V, T C=25 C 110 V GS=20V, T C=110 C 64 A Pulse Drain Current I D, pulse t PW limitation per Fig Avalanche energy, Single Pulse E AS V DD=100V, I D=18A 4 J Power Dissipation P D T C=25 C 338 W Gate Source Voltage (static) V GS, op Static -5/+20 Gate Source Voltage (dynamic) V GS, max AC (f > 1Hz) -10/+25 V Junction & Storage Temperature T j, T stg -55/+150 Soldering Temperature T L 260 C Nov
2 Electrical Characteristics (Tj=25 C) Parameter Symbol Test Conditions Min. Typ. Max. Unit Drain-Source Breakdown Voltage V (BR)DSS V GS=0V, I DS=100µA 650 V Gate Threshold Voltage V GS(th) V DS=10V, I DS=20mA V V DS=650V, V GS=0V <1 100 Zero Gate Voltage Drain Current I DSS V DS=650V, V GS=0V µa T j=150 C Gate-Source Leakage Current I GSS V GS=20V, V DS=0V 250 na V GS=20V, I DS=50A Drain-Source On-State Resistance R DS(on) V GS=20V, I DS=50A, mω 27 T j=150 C Input Capacitance C iss 4130 V GS=0V, V DS=400V Output Capacitance C oss 353 f =1MHz, V AC=25mV Reverse Transfer Capacitance C rss 53 Effective Output Capacitance, Energy Related Effective Output Capacitance, Time Related C o(er) C o(tr) V GS=0V, V DS=0 to 400V I D=const., V GS=0V, V DS=0 to 400V Turn On Delay Time t d(on) V DS=400V, pf Rise Time t r V GS=-4/+20V, 51 ns Turn Off Delay Time t d(off) I D=35A, R L=11.4Ω, 30 Fall Time t f R G(ext)= 2.7 Ω 16 C oss Stored Energy E oss V GS=0V, V DS=400V 46 f =1MHz, V AC=25mV Turn-on Switching Energy E on V DS=400V, 71* µj Turn-off Switching Energy E off V GS=0/20V, I D=50A, R G(ext)= 2.7 Ω 116* Internal Gate Resistance R G(int.) f =1MHz, V AC=25mV 0.6 Ω *Based on the results of calculation, note that the energy loss caused by the reverse recovery of FWD is not included in E on. Built-in SiC Diode Characteristics (Tj=25 C) Parameter Symbol Test Conditions Typ. Unit Inverse Diode Forward Voltage V SD V GS=0V, I SD=10A 2.6 V Continuous Diode Forward Current I S V GS=0V, T C=25 C 63 A Reverse Recovery Time t rr V GS=0V, 77 ns Reverse Recovery Charge Q rr I SD=30A, V DS=400V, 301 nc Peak Reverse Recovery Current I rrm di/dt=300a/µs 6.9 A Nov
3 Gate Charge Characteristics (Tj=25 C) Parameter Symbol Test Conditions Value Unit Gate to Source Charge Q GS 80 V DS=400V, Gate to Drain Charge Q GD 75 nc V GS=-5/+20V, Total Gate Charge Q G 287 I D=50A Gate plateau voltage V pl 7.6 V Thermal Resistance Parameter Symbol Value Unit Thermal Resistance, Junction to Case R θ,jc 0.37 K/W Typical Device Performance Fig. 1 Forward Output Characteristics at Tj = 25 C Fig. 2 Forward Output Characteristics at Tj = 150 C Fig. 3 On-Resistance vs. Drain Current for Fig. 4 Transfer Characteristics for Various Tj Various Tj Nov
4 Typical Device Performance Fig. 5 On-Resistance vs. Gate Voltage for Various Tj Fig. 6 On-Resistance vs. Temperature for Various Gate Voltage Fig. 7 Normalized On-Resistance vs. Temperature Fig. 8 Reverse Output Characteristics at Tj = 25 C Fig. 9 Reverse Output Characteristics at Tj = 150 C Fig. 10 Capacitances vs. Drain to Source Voltage (0-100V) Nov
5 Typical Device Performance Fig. 11 Capacitances vs. Drain to Source Voltage (0-400V) Fig. 12 Threshold Voltage vs. Temperature Fig. 13 Output Capacitor Stored Energy Fig. 14 Maximum Power Dissipation Derating vs. Case Temperature Fig. 15 Drain Current Derating vs. Case Temperature Fig. 16 Transient Junction to Case Thermal Impedance Nov
6 Typical Device Performance Fig. 17 Safe Operating Area Fig. 18 Gate Charge Characteristics Fig. 19 Clamped Inductive Switching Energy vs. Drain Current (VDD=400V)* Fig. 20 Clamped Inductive Switching Energy vs. Drain Current (VDD=300V)* Fig. 21 Clamped Inductive Switching Energy vs. External Gate Resistor (RG(ext.))* *Based on the results of calculation, note that the energy loss caused by the reverse recovery of FWD is not included in E on. Nov
7 Recommended Solder Pad Layout (TO-247-3L) Mechanical Parameters Parameter Symbol Typical Unit A B Length mm C D Mechanical Parameters *The information provided herein is subject to change without notice. Nov
TO-220-3L Inner Circuit Product Summary C) RDS(on) Parameter Symbol Test Conditions Value Unit
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