Design and Hardware Implementation of Interleaved Boost Converter Using Sliding Mode Approach
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1 International Journal of Electronics Engineering Research. ISSN Volume 9, Number 5 (2017) pp Research India Publications Design and Hardware Implementation of Interleaved Boost Converter Using Sliding Mode Approach Dr. K. Balachander and Dr. A. Amudha Department of EEE, Faculty of Engineering, Karpagam University, KAHE kaybe.ind@gmail.com Abstract This paper focuses on the analysis and hardware design performance of digitally controlled power factor correction system based on two interleaved boost converters operating with pulse width modulation (PWM) technique. Inner control loop based on a discrete time sliding mode (SM) control is used for controlling both converters and it imposes loss free resistor actions on each cell. We get high power factor in average mode controller for switching surface implements. Here, the performance parameters of two interleaved converter are analyzed. The converter is simulated using MATLAB and also the converters are implemented in hardware. Keywords: Pulse Width Modulation, AC-DC, Power Conversion, Power factor Correction, A-DC-AC, Interleaved INTRODUCTION Recently all investigators and analyzers have been motivated to improve power factor correction (PFC) and the excellence of the grid current complies with the stipulations of customary regulations. Although various switching techniques are used in power converters. Bridge diode configuration is trendy PFC circuit for lower capacity (less than 1kW) boost converter connected to the grid and it has more advantages. The interleaving technique is used for higher capacity. Two or more converters are in parallel and switched by same frequency and phase changing their relevant control signals. This technique reduces number of components in the circuit and component stress but it generates some amount electromagnetic interference (EMI) levels. The paper presents the hardware output results of digitally controlled power factor correction system based on two interleaved boost converters operating with pulse width modulation (PWM) technique.
2 746 Dr. K. Balachander and Dr. A. Amudha PROPOSED SYSTEM The proposed model (Fig. 1) is simulated in MATLAB. In this work, two boost converters functioned with 180 phase shift to trim down the input ripple current and switching is done by through an additional passive supporting circuit placed in between the two phases of the interleaved boost converter. This 180 phase shift can be used to provide reactive current for realizing zero voltage switching for usage of power transistors. This additional circuit includes a high frequency inductor and a dcblocking capacitor. Fig.1 Proposed Simulation Model The proposed power factor correction system consists (Fig. 2) of two interleaved unidirectional boost converters AC-DC-AC, which are regulated by a digital controller (Fig. 3). In existing system implemented, the inverter circuit in output circuit. The inverter circuit consists of Transistors and gate triggering circuit. Fig. 2 Proposed AC-DC-AC interleaved boost converter Hardware Description The hardware circuit (Fig. 3) part is developed based on the severity of the components and it consists of Control circuit board, Control Supply Transformers, Rectifier Board, Interleaved board, Inverter board and Load.
3 Design and Hardware Implementation of Interleaved Boost Converter 747 Fig. 3 Hardware Connection Diagram The input step down AC supply is feed to the interleaved board through full wave rectifier circuit. The input voltage is converted to DC voltage and it is available at interleaved circuit. Based on the MOSFET switching ON and OFF, the output DC voltage is converted to DC voltage in the parallel circuit operation based on the loss free resistor operation. The two inductors are sharing the input load supply. Output of the DC board is connected to the inverter circuit and based on the output MOSFET gate pulse, the DC voltage is converted into the AC supply based on the timing signal from the gate driver circuit. Modifying the gate pulses timing and signal amplitude, the output is controlled. For generation of gate pulses, PIC Microcontroller is used. For the circuit power supplies, separate voltage regulator circuit is used. Converter Input and Output voltages are measured by using oscilloscope and digital volt meter. Fig. 4 Overall view of Hardware implementation of AC-DC-AC interleaved boost converters
4 748 Dr. K. Balachander and Dr. A. Amudha Fig. 4 shows the Overall view of Hardware implementation of AC-DC-AC interleaved boost converters. It consists of control circuit board, transformers, rectifier board, interleaved board and load. Fig. 5 Input AC Voltage Fig. 6 Interleaved DC Output Fig. 5 and 6 shows the input AC voltage and Interleaved DC Output measured by digital volt meter (Vin = 14.1V and Vout = 54.1V) and Fig. 7 shows the proposed converter with load and Output AC wave form.. Fig. 7 Proposed Converter with Load and Output wave form CONCLUSION Interleaved AC to DC and DC to ACPFC allows a more efficient power factor correction design. It also allows space savings since with a much smaller inductors are needed compared to single stage PFC design. Two inductors are sharing one load at different times. Digital signal controllers combine the right set of peripherals and computational power to enable Interleaved PFC control with a single device of both AC to DC and DC to AC.
5 Design and Hardware Implementation of Interleaved Boost Converter 749 REFERENCES [1] Jingquan Chen, Dragan Maksimovic and Robert W. Erickson Analysis and Design of a Low-Stress BuckBoost Converter in Universal-Input PFC Applications IEEE Transactions on Power Electronics, Vol. 21, No. 2, pp , March [2] Yao-Ching Hsieh, Te-Chin Hsueh and Hau-Chen Yen An Interleaved Boost Converter with Zero-Voltage Transition IEEE Transactions on Power Electronics, Vol. 24, No.4, pp , April [3] M. OLeary, Plug in safeguard AC power line quality, EDN, pp , Mar.18,2004. [4] Vasist Bist. Bhim Singh., PFC Cuk converter Fed BLDC motor drive, IEEE Trans. Power electronics, vol. 30,No.2 Feb [5] Jomy Joy, Amal M.R, An efficient bridgeless PFC cuk converter based PMBLDCM drive, International journal of innovative research in electrical, electronics, instrumentation and control engineering, vol. 2, issue. 2, Feb2014. [6] Sinsha. V, E.Thangam, Bridgeless cuk converter fed BLDC motor with PFC for Air conditioning system, IJERT T, vol. 3, Issue 2, Feb [7] H.Kosai, S. McNeal, B. Jordan, J. Scofield, B.Ray, and Zubrerei Turgut, Coupled inductor characterization for a high performance interleaved boost converter, IEEE Trans. Magn., vol. 45, no. 10, pp , Oct [8] F.Musavi, W.Eberle, and W.G. Dunford, A high performance single Phase bridgeless interleaved PFC converter for plug-in hybrid electric vehicle battery chargers, IEEE Trans. Ind. Appl., vol. 47, no. 4, pp , Jul./Aug [9] N. Jain, P. Jain, and G. Joos, A zero voltage transition boost converter employing a soft switching auxiliary circuit with reduced conduction losses, IEEE Trans. Power Electron., vol. 19, no. 1, pp , Jan [10] Yu-Tzung Lin and Ying-Yu Tzou, "Digital Control of Boost PFC AC/DC Converters with Low THD and Fast Dynamic Response," IEEE IPEMC Conf. Rec., pp , [11] F.J.Azcondo, A.de Castro, V.M.Lopez and O.Garcia, "Power Factor Correction without Current Sensor based on Digital Current Rebuilding," IEEE Transaction on Power Electronics, Vol. 25, pp , 2009 [12] V.M.Rao, K.A.Jain, K.K.Reddy and A.Behal,"Experimental Comparison of Digital Implementations of Single-Phase PFC Controllers," IEEE Transaction on Power Electronics, Vol. 55, No.1, pp.67-78, 2008 [13] Cid-Pastor, R. Giral, J. Calvente, V. I. Utkin, and L. MartinezSalamero, Interleaved converters based on sliding-mode control in a ring configuration,
6 750 Dr. K. Balachander and Dr. A. Amudha IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 58, no. 10,pp , Oct [14] Sanghyuk Lee, Pyosoo Kim, and Sewan Choi High Step-Up Soft-Switched Converters Using Voltage Multiplier Cells IEEETransactions on Power Electronics, Vol. 28, No.7, pp , July [15] S. Singer and R. W. Erickson, Canonical modeling of power processing circuits based on the POPI concept, IEEE Trans. Power Electron.,vol.7,no. 1, pp , Jan [16] Adria Marcos-Pastor, Enric Vidal-Idiarte,Angel Cid-Pastor, L. Martinez- Salamero, Interleaved Digital Power Factor Correction Based on the Sliding- Mode Approach, IEEE Transactions on Power Electronics, Vol. 31, No. 6, pp , June 2016
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