MMBT5087L. Low Noise Transistor. PNP Silicon
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1 Low Noise Transistor PNP Silicon Features NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ1 Qualified and PPAP Capable These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant MAXIMUM RATINGS Rating Symbol Value Unit CollectorEmitter Voltage V CEO 5 Vdc CollectorBase Voltage V CBO 5 Vdc EmitterBase Voltage V EBO. Vdc Collector Current Continuous I C 5 madc THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Total Device Dissipation FR5 Board, (Note 1) T A = 25 C Derate above 25 C P D mw mw/ C BASE COLLECTOR 2 EMITTER SOT2 (TO26) CASE 18 STYLE 6 MARKING DIAGRAM Thermal Resistance, JunctiontoAmbient R JA 556 C/W Total Device Dissipation Alumina Substrate, (Note 2) T A = 25 C Derate above 25 C P D 2.4 mw mw/ C Thermal Resistance, JunctiontoAmbient R JA 417 C/W Junction and Storage Temperature T J, T stg 55 to +15 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. FR5 = x.75 x.62 in. 2. Alumina =.4 x. x.24 in. 99.5% alumina. 1 2Q M 2Q = Device Code M = Date Code* = PbFree Package (Note: Microdot may be in either location) *Date Code orientation and/or overbar may vary depending upon manufacturing location. ORDERING INFORMATION Device Package Shipping MMBT587LT1G, NSVMMBT587LT1G MMBT587LTG, NSVMMBT587LTG SOT2 (PbFree) SOT2 (PbFree), / Tape & Reel, / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. Semiconductor Components Industries, LLC, 214 March, 214 Rev. 5 1 Publication Order Number: MMBT587LT1/D
2 ELECTRICAL CHARACTERISTICS (T A = 25 C unless otherwise noted) Characteristic Symbol Min Max Unit OFF CHARACTERISTICS CollectorEmitter Breakdown Voltage (I C = madc, I B = ) CollectorBase Breakdown Voltage (I C = Adc, I E = ) V (BR)CEO 5 Vdc V (BR)CBO 5 Vdc Collector Cutoff Current (V CB = Vdc, I E = ) (V CB = 5 Vdc, I E = ) I CBO 5 nadc ON CHARACTERISTICS DC Current Gain (I C = Adc, V CE = 5. Vdc) (I C = madc, V CE = 5. Vdc) (I C = madc, V CE = 5. Vdc) h FE CollectorEmitter Saturation Voltage (I C = madc, I B = madc) BaseEmitter Saturation Voltage (I C = madc, I B = madc) V CE(sat). Vdc V BE(sat) 5 Vdc SMALLSIGNAL CHARACTERISTICS CurrentGain Bandwidth Product (I C = Adc, V CE = 5. Vdc, f = 2 MHz) Output Capacitance (V CB = 5. Vdc, I E =, f = MHz) SmallSignal Current Gain (I C = madc, V CE = 5. Vdc, f = khz) f T 4 MHz C obo 4. pf h fe 25 9 Noise Figure (I C = 2 madc, V CE = 5. Vdc, R S = k, f = khz) (I C = Adc, V CE = 5. Vdc, R S =. k, f = khz) NF db TYPICAL NOISE CHARACTERISTICS (V CE = 5. Vdc, T A = 25 C) en, NOISE VOLTAGE (nv) ma I C = A A A A 2 5 k 2. k 5. k k f, FREQUENCY (Hz) Figure 1. Noise Voltage BANDWIDTH = Hz R S In, NOISE CURRENT (pa) I C = ma A A A A k 2. k 5. k k f, FREQUENCY (Hz) Figure 2. Noise Current BANDWIDTH = Hz R S 2
3 NOISE FIGURE CONTOURS (V CE = 5. Vdc, T A = 25 C) RS, SOURCE RESISTANCE (OHMS) M k k k 5 k 2 k k 5. k 2. k k.5 db db I C, COLLECTOR CURRENT ( A) BANDWIDTH = Hz 2. db. db RS, SOURCE RESISTANCE (OHMS) M k k k 5 k 2 k k 5. k 2. k k 5. db 5. db k k.5 db I C, COLLECTOR CURRENT ( A) BANDWIDTH = Hz db 2. db. db RS, SOURCE RESISTANCE (OHMS) M k k k 5 k 2 k k 5. k 2. k k Figure. Narrow Band, Hz.5 db I C, COLLECTOR CURRENT ( A) Figure 5. Wideband Hz to 15.7 khz db 2. db. db 5. db k Figure 4. Narrow Band, khz Noise Figure is Defined as: NF 2 log e n 2 4KTRS In 2 RS KTRS e n = Noise Voltage of the Transistor referred to the input. (Figure ) I n = Noise Current of the Transistor referred to the input. (Figure 4) K = Boltzman s Constant (1.8 x 2 j/ K) T = Temperature of the Source Resistance ( K) R S = Source Resistance (Ohms)
4 TYPICAL STATIC CHARACTERISTICS VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS) I B, BASE CURRENT (ma) T A = 25 C I C = ma ma 5 ma ma IC, COLLECTOR CURRENT (ma) T A = 25 C PULSE WIDTH = s DUTY CYCLE 2.% 5 A I B = 4 A A 25 A V CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) A 15 A A 5 A Figure 6. Collector Saturation Region Figure 7. Collector Characteristics V, VOLTAGE (VOLTS) V I C /I B = V V CE = V VB for V BE V I C /I B = V, TEMPERATURE COEFFICIENTS (mv/ C) θ 1.6 *APPLIES for I C /I B h FE /2 * VC for V CE(sat) 25 C to 125 C -55 C to 25 C 25 C to 125 C -55 C to 25 C Figure 8. On Voltages Figure 9. Temperature Coefficients 4
5 TYPICAL DYNAMIC CHARACTERISTICS t, TIME (ns) t V BE(off) =.5 V t r V CC =. V I C /I B = t, TIME (ns) t s t f V CC = -. V I C /I B = I B1 = I B Figure. TurnOn Time Figure 11. TurnOff Time f, T CURRENT-GAIN BANDWIDTH PRODUCT (MHz) V CE = 2 V 5. V C, CAPACITANCE (pf) C ib C ob V R, REVERSE VOLTAGE (VOLTS) Figure 12. CurrentGain Bandwidth Product Figure 1. Capacitance 5
6 r(t) TRANSIENT THERMAL RESISTANCE (NORMALIZED) D = SINGLE PULSE k 2. k 5. k k 2 k 5 k k t, TIME (ms) P (pk) FIGURE 16 t 1 t2 DUTY CYCLE, D = t 1 /t 2 D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t 1 (SEE AN569/D) Z JA(t) = r(t) R JA T J(pk) T A = P (pk) Z JA(t) Figure 14. Thermal Response IC, COLLECTOR CURRENT (na) V CC = V -2 I CEO T J, JUNCTION TEMPERATURE ( C) I CBO AND I V BE(off) =. V Figure 15. Typical Collector Leakage Current DESIGN NOTE: USE OF THERMAL RESPONSE DATA A train of periodical power pulses can be represented by the model as shown in Figure 16. Using the model and the device thermal response the normalized effective transient thermal resistance of Figure 14 was calculated for various duty cycles. To find Z JA(t), multiply the value obtained from Figure 14 by the steady state value R JA. Example: Dissipating 2. watts peak under the following conditions: t 1 = ms, t 2 = 5. ms (D =.2) Using Figure 14 at a pulse width of ms and D =.2, the reading of r(t) is.22. The peak rise in junction temperature is therefore T = r(t) x P (pk) x R JA =.22 x 2. x = 88 C. For more information, see ON Semiconductor Application Note AN569/D, available from the Literature Distribution Center or on our website at 6
7 PACKAGE DIMENSIONS SOT2 (TO26) CASE 188 ISSUE AP A E A1 D 1 2 e b HE SEE VIEW C L L1 VIEW C c.25 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH.. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A A b c D E e L L H E STYLE 6: PIN 1. BASE 2. EMITTER. COLLECTOR SOLDERING FOOTPRINT* SCALE :1 mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 516, Denver, Colorado 8217 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MMBT587LT1/D
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