Low Power Voltage Inverters With Shutdown

Transcription

1 /8 Low Power Voltage Inverters With Shutdown FEATURES 99.9% Voltage Conversion Efficiency +.V to +.V Input Voltage Range Inverts Input Supply Voltage 7µA Supply Current for the µa Supply Current for the khz Operating Frequency for the khz Operating Frequency for the <µa Shutdown Current -pin SOT- Package Ideal for +.V Lithium Ion Battery Applications Reverse +.V Lithium Ion Battery Protection ma Output Current 9Ω Output Resistance Now available in Lead Free APPLICATIONS Small LCD Negative Bias Voltage Power Amplifier Negative Bias Voltage +V to -V Voltage Conversion DESCRIPTION The /8 devices are CMOS Charge Pump Voltage Inverters that can be implemented into designs which require a negative voltage from a battery voltage source as low as +.V or a power supply rail voltage as high as +.V. The /8 devices are ideal for both battery-powered and board level voltage conversion applications with a typical operating current of 7µA for the and µa for the. These devices combine an ultra-low shutdown current of <µa with high efficiency (>9% over most of its load-current range) which are ideal for designs using batteries such as cell phones, PDAs, medical instruments, and other portable equipment. The /8 devices are available in a space-saving -pin SOT- Package. VOUT C+ VIN C- Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation

2 ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability....-.v to +.V V OUT...-.V to +.V I OUT...mA Storage Temperature...- O C to + O C Lead Temperature (Soldering)... O C Power Dissipation Per Package -pin SOT (derate.mw/ O C above +7 O C)...mW SPECIFICATIONS = +V, C=C=C=.µF for the, C=C=C=µF for the, and T AMB =- C to +8 C unless otherwise noted. Typical values are taken specifically at T AMB =+ C. P ARAMETER M IN. T YP. MAX. Supply Voltage Range, Supply Current, I V. DD 7 VIN Note : Minimum required for V O = - +.V. UNITS. V R L = kω µa CONDITIONS Guaranteed Start-up Voltage. 8 V R L = kω, NOTE Shutdown Input Voltage HIGH LOW. V N V = V to V MIN.I V to V = MIN Shutdown Supply Current.. µa =, V Oscillator Frequency, f. OSC 7. Output Resistance 9 Ω I UT khz Voltage Conversion Efficiency % R L = open MAX MAX = V, NOTE IN = ma to ma, NOTE O Power Efficiency (Ideal) 98 % R L = kω, NOTE Power Efficiency (Actual) 9 % R L = kω, NOTE Note : During the shutdown mode, is disconnected from V OUT. Note : Capacitors are approximately % of the output impedance where ESR = f OSC x C. Note : Power Efficiency (Ideal) = VOUT x IOUT -VIN x (-VIN/RL) Note : Power Efficiency (Actual) = VOUT x IOUT VIN x IIN Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation

3 PINOUT PIN ASSIGNMENTS Pin V OUT Inverting charge pump output. VOUT C+ Pin Input to the positive power supply. VIN C- Pin C- Negative terminal to the charge pump capacitor. Pin Ground reference. Pin Active LOW Shutdown input. Pin C+ Positive terminal to the charge pump capacitor. -Phase Clock C SD OFF ON Shutdown C+ V OUT Comparator SD V EE * Pump Switches C- V OUT C V OUT *V EE = the lower voltage of V OUT and C R L DEVICE C C C f OSC.µF.µF.µF khz µf µf µf khz Figure. Voltage Inverter Circuit for the /8 Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation

4 TYPICAL PERFORMANCE CHARACTERISTICS = +.V, C = C = C =.µf for, C = C = C = µf for, and T AMB = O C unless otherwise noted. The /8 devices use the circuit found in Figure 7 when obtaining the following typical performance characteristics (unless otherwise noted). Output Resistance(Ohms).... Supply Voltage(V) Output Resistance(Ohms) Temperature(C) Figure. Output Resistance vs. Supply Voltage Figure. Output Resistance vs. Temperature 7 Frequency(kHz).... Supply Voltage(V) Frequency (khz) Supply Voltage(V) Figure. Charge Pump Frequency vs. Supply Voltage for the Figure. Charge Pump Frequency vs. Supply Voltage for the Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation

5 Supply Current (µa) TYPICAL PERFORMANCE CHARACTERISTICS (continued) = +.V, C = C = C =.µf for, C = C = C = µf for, and T AMB = O C unless otherwise noted. The /8 devices use the circuit found in Figure 7 when obtaining the following typical performance characteristics (unless otherwise noted). Frequency (khz) Temperature(C) Frequency (khz) Temperature(C) Figure. Charge Pump Freqency vs. Temperature for the Figure 7. Charge Pump Freqency vs. Temperature for the Supply Current (ma) Supply Voltage(V).... Supply Voltage(V) Figure 8. Supply Current vs. Supply Voltage for the Figure 9. Supply Current vs. Supply Voltage for the Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation

6 TYPICAL PERFORMANCE CHARACTERISTICS (continued) = +.V, C = C = C =.µf for, C = C = C = µf for, and T AMB = O C unless otherwise noted. The /8 devices use the circuit found in when obtaining the following typical performance characteristics (unless otherwise noted). Output Ripple (mv P - P ) = V, V out = -V =.V, V OUT = -.V = V, V OUT = -.V Capacitance (uf) Figure. Output Voltage Ripple vs. Capacitance for the Output Ripple (mv P - P ) = V, V OUT = -V =.V, V OUT = -.V = V, V OUT = -.V Capacitance (uf) Figure. Output Voltage Ripple vs. Capacitance for the 7 7 = V, V OUT = -V = V, V OUT = -V = V, V OUT = -V Output Current (ma) =.V, V OUT = -.V V in = V, V OUT = -.V Capacitance (uf) Output Current (ma) =.V, V OUT = -.V V in = V, V OUT = -.V Capacitance (uf) Figure. Output Current vs. Capacitance for the Figure. Output Current vs. Supply Voltage for the Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation

7 TYPICAL PERFORMANCE CHARACTERISTICS (continued) = +.V, C = C = C =.µf for, C = C = C = µf for, and T AMB = O C unless otherwise noted. The /8 devices use the circuit found in when obtaining the following typical performance characteristics (unless otherwise noted). Power Efficiency (%) =.V I LOAD = ma V OUT = -. 7 Output Current(mA) Figure. Power Efficiency vs. Output Current Figure. Output Noise and Ripple for the =.V I LOAD = ma V OUT = -.V Figure. Output Noise and Ripple for the Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation 7

8 VOUT C RL VIN C- C+ C C Figure 7: /8 Connected as a Voltage Inverter in its Typical Operating Circuit; this Circuit Was Used to Obtain the Typical Performance Characteristics Found in Figures Through (unless otherwise noted) Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation 8

9 DESCRIPTION The /8 devices are CMOS Charge Pump Voltage Converters that can be used to invert a +.V to +.V input voltage. These devices are ideal for designs involving batterypowered and/or board level voltage conversion applications. The typical operating frequency of the is khz. The typical operating frequency of the is khz. The has a typical operating current of 7µA and the operates at µa. Both devices can output ma with a voltage drop of mv. The devices are ideal for LCD panel bias applications, cellular phones, pagers, PDAs, medical instruments, and other portable battery-powered equipment. The /8 devices combine a high efficiency (>9% over most of its loadcurrent range) with a low quiescent current. THEORY OF OPERATION The /8 devices should theoretically produce an inverted input voltage. In real world applications, there are small voltage drops at the output that reduce efficiency. The circuit of an ideal voltage inverter can be found in Figure 8. The voltage inverters require two external capacitors to store the charge. A description of the two phases follows: Phase In the first phase of the clock cycle, switches S and S are opened and S and S closed. This connects the flying capacitor, C, from to ground. C charges up to the input voltage applied at. Phase In the second phase of the clock cycle, switches S and S are opened and S and S are closed. This connects the flying capacitor, C, in parallel with the output capacitor, C. The charge stored in C is now transferred to C. Simultaneously, the negative side of C is connected to V OUT and the positive side is connected to ground. With the voltage across C smaller than the voltage across C, the charge flows from C to C until the voltage at the V OUT equals -. VIN S S VOUT = -VIN C S S C Figure 8. Circuit for an Ideal Voltage Inverter Charge-Pump Output The output of the /8 devices is not regulated and therefore is dependent on the output resistance and the amount of load current. As the load current increases, losses may slightly increase at the output and the voltage may become slightly more positive. The loss at the negative output, V LOSS, equals the current draw, I OUT, from V OUT times the negative converter's source resistance, R S : V LOSS = I OUT x R S. The actual inverted output voltage at V OUT will equal the inverted voltage difference of and V LOSS : V OUT = -( - V LOSS ). Efficiency Theoretically, the total power loss of a switched capacitor voltage converter can be summed up as follows: P LOSS = P INT + P CAP + P CONV, VOUT where P LOSS is the total power loss, P INT is the total internal loss in the IC including any losses in the MOSFET switches, P CAP is the resistive loss of the charge pump capacitors, and P CONV is the total Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation 9

10 conversion loss during charge transfer between the flying and output capacitors. These are the three theoretical factors that may effect the power efficiency of the /8 devices in designs. Any internal losses come from the IC's on board circuitry. Losses in the IC can be induced by the input voltage, the frequency of the oscillator, and the ambient temperature. The most influential internal loss in the IC may be found in the poweron resistance of the internal MOSFET switches. Any of the losses with the charge pump capacitors will be induced by the capacitor's ESR. The affects of the ESR losses and the output resistance can be found in the following equation: I OUT x R OUT = P CAP + P CONV and R OUT x ( x R SWITCHES + ESR C ) + ESR C + fosc x C, where P OUT = V OUT x I OUT and P IN = x I IN where P OUT is the power output, V OUT is the output voltage, I OUT is the output current, P IN is the power from the supply driving the / 8 devices, is the supply input voltage, and I IN is the supply input current. Ideal Efficiency The ideal efficiency is not the true power efficiency because it does not involve the input power which includes the input current losses in the charge pump. The ideal efficiency can be determined with the following equation: POUT Efficiency (ideal) = x %, POUT(IDEAL) where I OUT it the output current, R OUT is the circuit's output resistance, R SWITCHES is the internal resistance of the MOSFET switches, ESR C and ESR C are the ESR of their respective capacitors, and f OSC is the oscillator frequency. This term with f OSC is derived from an ideal switchedcapacitor circuit as seen in Figure 9. where POUT(IDEAL) = -VIN x -VIN RL, f Any losses due to the conversion process will happen during the charge transfer between the flying capacitor, C, and the output capacitor, C, when there is a voltage difference between them. P CONV can be determined by the following equation: V+ C C RL VOUT P CONV = f OSC x [ / x C x ( - V OUT ) + / x C x (V RIPPLE - V OUT V RIPPLE ) ]. Actual Efficiency To determine the actual efficiency of the / 8 device operation, a designer can use the following equation: V+ Requivalent Requivalent = f x C C RL VOUT POUT Efficiency (actual) = x %, PIN Figure 9. Equivalent Circuit for an Ideal Switched Capacitor Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation

11 and P OUT is the the power output. Both efficiencies are provided to designers for comparison. APPLICATION INFORMATION For the following applications, C = C = C =.µf for the and C = C = C =.µf for the. Capacitor Selection Low ESR capacitors are needed to obtain low output resistance. Refer to Table for some suggested low ESR capacitors. The output resistance of the /8 devices is a function of the ESR of C and C. This output resistance can be determined by the equation previously provided in the Efficiency section: R OUT x ( x R SWITCHES + ESR C ) + ESR C + fosc x C, where R OUT is the circuit's output resistance, R SWITCHES is the internal resistance of the MOSFET switches, ESR C and ESR C are the ESR of their respective capacitors, and f OSC is the oscillator frequency. This term with f OSC is derived from an ideal switched-capacitor circuit as seen in Figure 9. Minimizing the ESR of C and C will minimize the total output resistance and will improve the efficiency. Flying Capacitor Decreasing flying capacitor, C, values will increase the output resistance of the / 8 devices while increasing C will reduce the output resistance. There is a point where increasing C will have a negligible effect on the output resistance due to the the domination of the output resistance by the internal MOSFET switch resistance and the total capacitor ESR. Output Capacitor Increasing output capacitor, C, values will decrease the output ripple voltage. Reducing the ESR of C will reduce both output ripple voltage and output resistance. If higher output ripple can be tolerated in designs, smaller capacitance values for C should be used with light loads. The following equation can be used to calculate the peak-to-peak ripple voltage: VRIPPLE = x IOUT x ESRC + IOUT fosc x C. Input Bypass Capacitor The bypass capacitor at the input voltage will reduce AC impedance and the impact of any of the /8 device's switching noise. It is recommended that for heavy loads a bypass capacitor approximately equal to the flying capacitor, C, be used. For light loads, the value of the bypass capacitor can be reduced. SIPEX PART NUMBER MANUFACTURER/ TELEPHONE # PART NUMBER CAPACITANCE / VOLTAGE MAX khz CAPACITOR SIZE/TYPE KEMET / 8-9- T9B*.µF / V. Ω Case B / Tantalum SPRAGUE / 7-- 9DX.µF / V. Ω Case C / Tantalum TDK / CXRAK.µF / V.Ω / XR AVX / ZCK µf / V.Ω 8 / X7R KEMET/ 8-9- C8CKRAC µf / V.Ω 8 / X7R TDK / CXRAK Table. Suggested Low ESR Surface Mount Capacitors µf / V.Ω 8 / XR Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation

12 +VIN C C IN OUT C+ IN OUT C C+ C- C- C+ C- n IN OUT VOUT RTOT Shutdown Control Input VOUT = -VIN RTOT = ROUT n where VOUT = output voltage, VIN = input voltage, RTOT = total resistance of the devices connected in parallel, ROUT = the output resistance of a single device, and n = the total number of devices connected in parallel. C x n Figure. /8 Devices Connected in Parallel to Reduce Total Output Resistance +VIN IN IN IN C OUT C C+ OUT C C+ C- C- C+ C- n OUT VOUT C C C VOUT = -n x VIN where VOUT = output voltage, VIN = input voltage, and n = the total number of cascaded devices connected. Figure. /8 Devices Cascaded to Increase Output Voltage Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation

13 When loading the /8 devices from IN to OUT, the input current remains constant (disregarding any spikes due to internal switching). Implementing a.µf bypass capacitor should be sufficient. When loading the /8 devices from OUT to, the current from the supply will switch from twice that of I OUT and zero amperes. Designers should implement a large bypass capacitor (C = C) if the supply has a high AC impedance. Voltage Inverter A designer can find the most common application for the /8 devices in Figure 7 as a voltage inverter. The only external components needed are capacitors: the flying capacitor, C, the output capacitor, C, and the bypass capacitor, C (if necessary). This circuit is used to obtain the Typical Performance Characteristics found in Figures to (unless otherwise noted). Connecting in Parallel A designer can parallel a number of / 8 devices to reduce the output resistance for specific designs. All devices will need their own flying capacitor, C, but a single output capacitor will serve all of the devices connected in parallel by increasing the capacitance of C by a factor of n where n equals the total number of devices connected. This connection can be found in Figure. Cascading Devices A designer can cascade /8 devices to produce a larger inverted voltage output. Refer to Figure for this circuit connection. With two cascaded devices, the unloaded output voltage is decreased by the output resistance of the first device multiplied by the quiescent current of the second device connected. The total output resistance is greatly increased when more than two devices are cascaded. Driving Excessive Loads The output should never be pulled above ground. A designer should implement a Schottky diode (N87) from OUT to when driving heavy loads where a higher supply is sourcing current into OUT. Refer to Figure for this circuit connection. N87 Figure. Protection for Heavy Loads Combining a Doubler and Inverter Circuit A designer can connect a /8 device in a combination doubler/inverter circuit as seen in Figure. The doubler uses C and C while the inverter uses capacitors C and C. Loading either output decreases both output voltages to because both the doubler and the inverter circuits use the charge pump. Designers should not allow the total current output from the doubler and the inverter to exceed ma. Implementing Shutdown The /8 devices are enabled when the input pin is driven HIGH and disabled when driven LOW. This input must be tied to or to minimize any noise effects due to the internal switching of these devices. The input cannot be driven.v above without the possibility of introducing significant current flows. Layout and Grounding Designers should make an effort to minimize noise by paying special attention to the circuit layout with the /8 devices. External components should be connected in close proximity to the device and a ground plane should be implemented. This will keep electrical traces short minimizing parasitic inductance and capacitance. OUT Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation

14 C +VIN D = D = N8 IN D D VOUT C C+ C Shutdown Control Input C- OUT C VOUT VOUT = ( x VIN) - VFD - VFD VOUT = -VIN where VOUT = positive doubled output voltage, VIN = input voltage, VFD = forward bias voltage across D, VFD = forward bias voltage across D, and VOUT = inverted output voltage. Figure. /8 Device Connected in a Doubler/Inverter Combination Circuit Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation

15 PACKAGE: SOT- b C L e E e D C L C L a. DATUM 'A' A A A C E L A A. SYMBOL MIN MAX A.9. A.. A.9. b.. C.9. D.8. E.. E..7 L.. e.9ref e.9ref a O O Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation

16 ORDERING INFORMATION Model Temperature Range Package Type EK C to +8 C... SOT- EK/TR... - C to +8 C... SOT- EK C to +8 C... SOT- EK/TR... - C to +8 C... SOT- Please consult the factory for pricing and availability on a Tape-On-Reel option. Available in lead free packaging. To order, add "-L" suffix to the part number. Example: SPEU/TR=Tape & Reel. SPEU-L/TR = lead free. Corporation SIGNAL PROCESSING EXCELLENCE Sipex Corporation Headquarters and Sales Office Linnell Circle Billerica, MA 8 TEL: (978) 7-87 FAX: (978) sales@sipex.com Sales Office South Hillview Drive Milpitas, CA 9 TEL: (8) 9-7 FAX: (8) 9-7 Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others. Rev. 9-- /8 Low Power Voltage Inverters With Shutdown Copyright Sipex Corporation