Experiment 4: Three-Phase DC-AC Inverter

Transcription

1 1.0 Objectives he University of New South Wales School of Electrical Engineering & elecommunications ELEC4614 Experiment 4: hree-phase DC-AC Inverter his experiment introduces you to a three-phase bridge inverter circuit. he switching schemes for producing six-step quasi-squarewave and sine-modulated SPWM AC output voltages from such a circuit will be studied and tested. Effects of modulation frequency and third harmonic injection into the modulating waveform will also be studied. 2.0 Introduction Inverter circuits convert DC power from a DC source to AC of a desired voltage and frequency. hree-phase inverters are widely used in AC motor drive applications, in three-phase grid connetion to wind generators and other power system applications. he DC source is usually in the form of a battery, solar cell, rectified wind generator output or a rectified DC output from the fixed AC supply from the utility. he input may have characteristics of a voltage source or a current source. his experiment concerns a three-phase voltage source inverter in which the input to the inverter is from an ideal DC voltage source. 2.1 Voltage-source three-phase inverter A three-phase voltage source inverter is indicated in figure 1. It consists of three inverter legs consisting of two transistors and two diodes which are anti-parallel to their respective transistors. hese diodes act as energy return diodes when the load current is switched off by the transistors and the load inductance forces the current to continue to flow through suitable diodes to return the energy trapped in the load induactances back to the DC source. P i d + /2 1 D1 D 5 D5 0V A i a B i b C i c 4 D4 6 D6 2 D2 N /2 Phase A A Phase B Phase C R R N R C B Figure 1 Experiment 4 hree-phase inverter 1 F. Rahman/March 2009

2 he switching signals for each inverter leg are displaced by 120 with respect to the adjacent legs. he output line-line voltages are determined by the potential differences between the output terminals of each leg. Symmetrical three phase voltages across a three-phase load can be produced by switching the devices ON for either 180 of the output voltage waveform. With 180 conduction, the switching sequence is for the positive A-B-C phase sequence and the other way round for the negative (A-C-B) phase sequence. Whenever an upper switch in an inverter leg connected with the positive DC rail is turned ON, the output terminal of the leg goes to potential + /2 with respect to the center-tap of the DC supply. Whenever a lower switch in an inverter leg connected with the negative DC rail is turned ON, the output terminal of that leg goes to potential /2 with respect to the center-tap of the DC supply. Note that a center-tap of the DC supply has been created by connecting two equal valued capacitors across it. he center-tap is assumed to be at zero or earth potential. However, this contraption is artificial and really not essential; the center-tap may not exist in practice Six-step square-wave inverter In this case, each switch is turned ON for 180. Switches 1 and 4, which belong to the leftmost inverter leg, produces the output voltage for phase A. he switching signals for 1 and 4 are complementary, as are for and 6 or 5 and 2.. he switching signals for switches and 6, (which are for phase B, belonging to the middle leg), are delayed by 120 from those for 1 and 4 respectively, for the ABC phase sequence. Similarly, for the same phase sequence, the switching signals for switches 5 and 2 are delayed from the switching signals for and 6 by 120. he phase terminal voltages at A, B and C (sometimes called respective pole voltages) are determined by the states of the switches connected at each pole. Note that with 180 conduction (i.e., complementary switching), each pole voltage can have only two values (or discrete states), namely or. Considering that there are three poles, the number 2 2 possible output voltage states from the inverter are 2 = 8. Line-line voltage waveforms he line-line voltages, v AB, v BC and v CA are determined from the switching states at the poles) and the DC source voltage, ( ). hus, when switches 1 and are ON, v AB = 0V, when 1 and 6 are ON, v AB = +, and so on. he line-line voltages v AB, v BC and v CA (for the +ve or ABC phase sequence) are therefore quasi-square waveforms of 120 of ON and 60 of OFF durations, as shown in figure 2. Each is phase displaced from its adjacent ones by 120. Line-neutral voltage waveforms Line-neutral voltages are determined from the switching states and the neutral point voltage of the load which can be found by assuming that the load consists of a balanced three-phase resistor 2 bank. For instance, if 1, and 2 are ON, the potential of the neutral point of the load is 1 2 and therefore V AN and V BN will each be at potentials while v CN will be at. Similarly, when 4, 2 and are ON, the potential of the neutral point becomes potential v BN will become 2 and v AN and v CN will each be at d 1 V. 1, As a result, the Experiment 2 2 F. Rahman/March 2009

3 v AB + + v BC + v CA v AN 1 v AN 2 i A 1 2 v BN i B v BN i C v CN v CN Figure 2 Experiment 2 F. Rahman/March 2009

4 Line-line voltage he line-line output voltages are obtained by subtracting two square-wave waveforms which are 120 displaced from each other. Each of these waveforms would consist of harmonics orders 1,, 5, 7, 9, and so on. Because of the 120 phase shift between the waveforms, the triplen harmonics (of order which are multiples of ) of both will of the same phase and hence these cancel in the process of subtraction. Consequently, the triplen order harmonic voltages are eliminated from the line line voltage. he remaining harmonics are at n = 6r ± 1 where r is any positive integer, the n th harmonic having an amplitude 1/n times the fundamental component. = = Figure he line-line quasi-square output voltage waveform of figure 22.4 has amplitude and duration = 120. Fourier series representation of this waveform is given by = Vd cos ot cos 5 ot cos 7 ot cos 11 ot (1) he RMS values of the fundamental and higher order output voltages are, 6 Vd 6 Vd 6 Vd 6 Vd V l l,1 ; V l l,5 ; V l l,7 ; V l l,11 ; hus, Vl l, (2) and V l l,h 0.78V h d where h = 6n 1 and n = 1, 2,,.. () Line-neutral voltage he line-neutral voltage waveform for this inverter is as shown in figure 5. Fourier series representation of this waveform is given by 2 V d 1 V d V d 1 V d = Figure Vd cos ot cos5 ot cos7 ot cos11 ot (4) Experiment 2 4 F. Rahman/March 2009

5 RMS values of the fundamental and higher order terms of the line-neutral voltage are: 2 Vd 2 Vd 2 Vd 2 Vd V l n,1 ; V l n,5 ; V l n,7 ; V l n,11 ; Crossover-protection delay. (5) he switching transistors at the top and bottom of any one leg of the inverter must not conduct simultaneously to prevent short circuiting the DC source. hus, there must be a dead-time, d which must elapse before top and bottom transistors can change state. he duration of the deadtime is determined by the turn-off times of the switching devices used. ypically this is of the order of a few microseconds. Your experimental circuit includes a module which accepts a L level signal and produces two switching signals for an inverter leg with a variable dead-time in microseconds at the transitions. he timing diagram of figure 5 describes the operation of this circuit. A A+ 1 & 2 ON 1 & 2 OFF _ A A _ & 4 ON & 4 OFF d d d Figure 5. Output voltage control of three-phase inverters he output voltage of the 6-step quasi-square inverter can be adjusted, other than by adjusting the DC source voltage. here are a number of ways in which continuously variable -phase output voltage can be obtained. Only the Sinusoidal PWM (SPWM) schemes will be considered here. Sinusoidal PWM (SPWM) In this scheme, three reference sinusoidal signals representing the desired output waveform of the inverter is compared with a high frequency triangular or a sawtooth carrier waveform as indicated in figures 6 (a) and (b). he comparator output pulse becomes proportional to the level of the sinusoid at the centre of the pulse. (Hence the term Pulse-Width Modulation: PWM). hese outputs are used to switch the transistor pairs 1-4 and -6 and 5-2 in figure 1 to produce the inverter (leg) terminal voltage waveform of figure 6(c). he resulting inverter output now has much reduced harmonics, specially the lower order ones (which are more difficult to filter out). Figure 7 also indicates the inverter output voltage waveform and its harmonic spectrum. Figure 7 shows the harmonic profile of a SPWM inverter where m f = f c /f o = 7, where f o is the output frequency and f c is the carrier frequency. M, the depth of modulation, is the ratio of the amplitudes of the reference and the carrier waveforms. Experiment 2 5 F. Rahman/March 2009

6 v cw e c,a e c,b e c,c Figure 6(a) Figure 6(b) + v AB + v BC 0 + v CA 0 Figure 6(c) Experiment 2 6 F. Rahman/March 2009

7 + v AB 0 Figure 7(a) V 1 m f 2m m m + 2 f f f 2m f + 2 m f + 2 Harmonics v l-l Figure 7(b) Analysis of output voltage waveform Linear Modulation Range, m < 1 Considering that the positive DC bus voltage is + /2 and the negative DC bus voltage is /2 with respect to the center-tap of the DC supply, the output voltage waveform of a phase leg is a pulsewidth modulated bipolar AC waveform of magnitude =. he RMS value of the 2 fundamental of this voltage varies linearly with the depth of modulation m. hus, V d VAn,1 m m (6) where m is the depth of modulation. his has been indicated as the line-neutral voltage because, with SPWM and balanced three-phase load, the potential of the load neutral point and that of the DC supply center-tap should be the same. he RMS value of the fundamental line-line voltage is Vd VAB,1 m 0.612m V 2 2 d (7) Variation of the output voltage m is indicated in figure 8. Note that with m > 1, overmodulation occurs, and that the RMS fundamental output voltage increases with m until the output voltage waveforms becomes quasi-square for sufficiently high m. Note also that overmodulation drops pulses from the output and causes lower order harmonics to appear in the output. Experiment 2 7 F. Rahman/March 2009

8 V l l,1 V d 1.0 Figure 8.24 m he fundamental output voltage can be increased without dropping pulses by adding a third harmonic to the modulating waveform as indicated in the figure below, for m > 1. It can be shown that the fundamental line-line output voltage can be increased by 15.5% of what is by linear modulation. Although some third harmonic voltage is added to the modulating waveform, the third harmonic phase currents in a star connected load must always cancel. For this 1 ec,a m sin ot m sin ot and so on for other phases. (8) 6 Figure 9 shows the waveforms of the modulating and output waveforms for this scheme. + 0 Figure 9 Experiment 2 8 F. Rahman/March 2009

9 5. Equipment IGB inverter legs with feedback diodes 1 phase diode rectifier module 1 LC filter comprising of one 22mH/5 A inductor and 1 capacitor bank with four 200VDC/4600 MFD capacitors connected in two groups of two in parallel and then in series giving a centre tap. 1 three-phase load resistor bank 22mH/5A inductor for load inductances 1 three-phase PWM module 1 three-channel cross-over protection module isolated current transducers; 1V/1A 1 isolated voltage transducer; 1V/50V 1 four-channel oscilloscope 1 DC voltmeter and ammeter module 1 AC voltmeter and ammeter module 1 PC with digital signal processor and its interface. 1 Loadbank with switches 6. Experiment A three-phase transistor consists of three inverter legs as shown in figure 10. he two transistors in each leg of the inverter must be switched in a complementary manner taking into account their dead-time requirements. Filter Idc 1 5 PHASE 415V 50Hz Vdc C D 1 D D IB I R I Y o CRO o CRO o CRO D 4 D D I ac V ac RY o CRO IBM PC MS20C1 DSP BASED CONROLLER COCKPI CONROL PANEL DSP BOARD INERFACE DAC1 DAC2 DAC PULSE WIDH MODULAOR X-OVER PROECION DELAY d = 10 sec A+ _ A B+ B _ C+ C _ SW1 LOAD L R SW2 L R NUERAL R L SW Figure 10 Experiment 2 9 F. Rahman/March 2009

10 Six-step, quasi-square-wave inverter Familiarise yourselves with the -phase inverter hardware comprising of the rectified DC source, its adjustment via the autotransformer (variac), the DSP board with the digital and PWM I/O and the three-phase load. 5.1 Close all the three load switches S1-S to obtain a three-phase load. Check that the same number load resistors are selected in each phase for a balanced load. Also add three balance inductances in series with the load resistance of each phase. Connect the BNC leads for the switching signals, 5 and 6, for the third leg of the inverter as shown in figure 10. Connect DAC1, DAC2 and DAC directly to the input of the three crossover protection circuits to bypass the modulators. Set the dead-time in the cross-over protection module to 10 sec. 5.2 urn the DC supply to the inverter to zero by adjusting the variac. Run hree-phase Square-wave Inverter using the icon in the directory Elec4614_labs_phinverter on the desktop. his DSP program produces three 180 square-wave L logic signals at 50Hz, which are at 120 phase displacement with each other. Observe and sketch the inverter switching signals for each phase on the CRO, making the time-base used on the CRO such that one full cycle of the output frequency is displayed over full screen of the CRO. 5. Raise the DC link voltage to 200V slowly and record waveforms of the line-line voltage, a line-neutral load voltage and a load current on the CRO and sketch these on your logbook. Record the RMS values in dbv of a few harmonics, including the fundamental, of the lineline, line-neutral voltage and of the line current using the CRO based FF. Do not allow the load current in any phase to exceed 4A. Adjust the DC link supply to the inverter to zero. -Phase SPWM Inverter For producing three-phase sinusoidal output voltage from an inverter, three symmetrical sinusoidal modulating signals with 120 phase displacement with each other are each compared with a high frequency carrier to produce switching signals for the three legs of the inverter. he amplitudes of the modulating signals control the amplitudes of the fundamental output voltages of the inverter directly. 5.4 Run the DSP program hree-phase Sinewave Inverter 1 khz in the same directory above. Run the DSpace Control Desk and under file menu open experiment hree-phase Sinewave Inverter 1 khz (D:\dSpace\work\inverter\PHsin1kHz). Under menu instrument, select Animation Mode. Connect the PWM1, PWM, PWM5 outputs of the interface box to the Crossover protector inputs R, Y, B respectively. he rest of the inverter connections remain unchanged. Adjust the amplitude of the modulating waveforms to about 5V peak-peak (modulating index, m = 0.5). Observe a modulating signal and the relevant PWM switching signals for the same phase on the CRO, after synchronising their triggering. Sketch the waveforms. 5.5 Increase the DC-link voltage to 200V slowly and observe a line-line and a line-neutral output voltage and a phase current waveforms of the load. abulate the RMS values of the Experiment 2 10 F. Rahman/March 2009

11 fundamental and a few higher order harmonics of these waveforms in dbv using the FF facility of the CRO. Vn in dbv = 20 log10 (Vnrms ) 5.6. Repeat 5.5 for m in the range from 0 1, in steps of 0.2. Adjust the DC link voltage to the inverter to zero. 5.7 Repeat 5.5 and 5.6 with switching frequency f s = 5kHz and 10kHz. For f s = 5 khz, run the DSP program hree-phase Sinewave Inverter 5 khz using the icon on the desktop. Under Control Desk filemenu, open experiment hree-phase Sinewave Inverter 5 khz (D:\dSpace\work\inverter\PHsin5kHz). Under menu instrument, select Animation Mode. For f s = 10 khz, run the DSP program hree-phase Sinewave Inverter 10 khz using the icon on the desktop. Under Control Desk filemenu, open experiment hree-phase Sinewave Inverter 10 khz (D:\dSpace\work\inverter\PHsin10kHz). Under menu instrument, select Animation Mode. Adjust the DC link voltage to the inverter to zero Run the DSP program Inverter with rd harmonic injection 1 khz. Under Control Desk filemenu open experiment Inverter with third harmonic injection 1 khz (D:\dSpace\work\inverter\PHsinovm1kHz). Under menu instrument, select Animation Mode his program adds 15.5% of rd harmonic component to the modulating signals for each phase. Slowly increase the DC link voltage to 200V. 5.9 Repeat 5.5 for m = 1, 2, and 4, and record the RMS values in dbv of the fundamental and few higher order harmonics of the line-line, and line-neutral voltage and line current of the load. Adjust the DC link supply to the inverter to zero Run the DSP program Inverter with rd harmonic injection 5 khz. Under filemenu select experiment Inverter with third harmonic injection 5 khz (D:\dSpace\work\inverter\PHsinovm5kHz). Under menu instrument, select Animation Mode. Slowly increase the DC link voltage to 200V Repeat 5.9 for f s = 5 khz Adjust the DC link supply to the inverter to zero. 6.0 Report 6.1 Using data from section 5., compare the measured RMS values of the fundamental and the the recorded harmonics of the line-line and line-neural voltages of the three-phase quasi-square-wave inverter with their predicted values from equations 2 and Plot the measured RMS values of the fundamental and the harmonics of the line-line and line-neutral voltages and line currents of the three-phase quasi-square-wave inverter Experiment 2 11 F. Rahman/March 2009

12 6. Comment on the observed effects of switching frequency on the SPWM inverter output current waveform at low and high switching frequencies. Use the CRO FF data to clarify this. 6.4 For 0 < m < 1, plot the variation of the RMS value of the fundamental output voltage with the depth of modulation m and discuss. 6.5 For 1 < m < 4, plot the variation of the the fundamental line-line and line-neutral voltages with and without rd harmonic injection and discuss. Experiment 2 12 F. Rahman/March 2009