ECE/CS 5720/6720 Super Trivia Game Show

Size: px
Start display at page:

Download "ECE/CS 5720/6720 Super Trivia Game Show"

Transcription

1 ECE/CS 5720/6720 Super Trivia Game Show Hosted by Prof. Cameron Charles March 4, 2008

2 Question Categories Devices Layout Building Blocks Opamps Important Information March 4, 2008 Cameron Charles Slide 2

3 Category: Devices Q: How does the junction capacitance of a PN junction change with increasing reverse bias? A: It decreases. Q: Why? March 4, 2008 Cameron Charles Slide 3

4 Category: Devices Q: Which terminal is the source on this NMOS device? A: Terminal 1. Q: If V T = 0.5 V, what operating region is this NMOS device in? A: Triode. March 4, 2008 Cameron Charles Slide 4

5 Category: Pop Culture Q: How does one say Hello in Kazahki? A: Jagshemash! March 4, 2008 Cameron Charles Slide 5

6 Category: Devices Q: Which terminal is the source on this PMOS device? A: Terminal 2. Q: If V T = 0.5 V, what operating region is this PMOS device in? A: Saturation. March 4, 2008 Cameron Charles Slide 6

7 Category: Devices Q: What large signal device parameter is influenced by the Body Effect? A: The threshold voltage. Q: Does it go up or down? A: Up. March 4, 2008 Cameron Charles Slide 7

8 Category: Pop Culture Q: Who is this? A: K-Fed. Q: What did his moniker change to after Britney dumped him? A: Fed-ex. March 4, 2008 Cameron Charles Slide 8

9 Category: Devices Q: Explain the mechanism behind Channel Length Modulation. A: The channel gets shorter, increasing W/L and increasing I D. Q: What would r ds be for a transistor with no Channel Length Modulation? A: Infinite. March 4, 2008 Cameron Charles Slide 9

10 Category: Devices Q: Which is the largest among the different small signal device capacitances? A: C GS (the gate-source capacitance). Q: In which operating region is this capacitance at a maximum? A: Saturation. March 4, 2008 Cameron Charles Slide 10

11 Category: Politics Q: Which of these men is the current Prime Minister of Canada? A: On the right. Q: What is his name? A: Stephen Harper. March 4, 2008 Cameron Charles Slide 11

12 Category: Layout Q: What does λ represent in our design rules? A: 2 λ = minimum gate length. March 4, 2008 Cameron Charles Slide 12

13 Category: Layout Q: What does DRC stand for? A: Design Rule Check. Q: What does LVS stand for? A: Layout Versus Schematic. March 4, 2008 Cameron Charles Slide 13

14 Category: Personal Life Q: What did you do last weekend? A: Studied for the 5720/6720 midterm. March 4, 2008 Cameron Charles Slide 14

15 Category: Building Blocks Q: What is the output resistance of a standard current mirror? A: r ds. Q: How about a cascode current mirror? A: g m (r ds2 ). March 4, 2008 Cameron Charles Slide 15

16 Category: Building Blocks Q: In what situation would you use a common-source amplifier? A: When you want high gain and can tolerate a high output impedance. Q: How about a common-drain amplifier? A: When you need a low output impedance. March 4, 2008 Cameron Charles Slide 16

17 Category: Grammer and Syntax Q: Which of these phrases uses correct grammer: I m doing well. I m doing good. A: The first one. Q: Why? A: well is an adverb, good is an adjective. March 4, 2008 Cameron Charles Slide 17

18 Category: Building Blocks Q: What is the approximate input impedance of a common-gate amplifier? A: 1/g m. March 4, 2008 Cameron Charles Slide 18

19 Category: Building Blocks Q: How can we increase the linear range of a differential pair? A: Reduce the input devices g m. March 4, 2008 Cameron Charles Slide 19

20 Category: Cycling Q: Who holds the record for most Tour de France victories? A: Lance Armstrong. Q: Was he correct in dumping Sheryl Crow? A: No, that was a huge blunder. March 4, 2008 Cameron Charles Slide 20

21 Category: Building Blocks Q: What is the definition of Common Mode Rejection Ratio? A: Differential gain divided by commonmode gain. Q: Would we like it to be high or low? A: High. March 4, 2008 Cameron Charles Slide 21

22 Category: Opamps Q: In what situations do we need the third stage (output buffer) in the opamp discussed in class? A: When driving a low impedance load. March 4, 2008 Cameron Charles Slide 22

23 Category: Pop Culture Q: Who is this guy? A: McLovin! (from SuperBad) March 4, 2008 Cameron Charles Slide 23

24 Category: Opamps Q: How does the Miller Effect help us when compensating an opamp? A: It allows us to use a smaller physical capacitor and also performs pole splitting. March 4, 2008 Cameron Charles Slide 24

25 Category: Opamps Q: How does systematic offset voltage arise in an opamp? A: When the transistors in the second stage are biased to have different drain currents. March 4, 2008 Cameron Charles Slide 25

26 Category: Feats of Strength Q: Which of these canyons is the hardest to ride up on a bike: Emigration Big Cottonwood Little Cottonwood Millcreek A: Little Cottonwood Canyon: 9.6 miles and 3300 vertical feet of suffering! March 4, 2008 Cameron Charles Slide 26

27 Category: Opamps Q: What is the slew rate of an opamp? A: The maximum rate at which the output voltage can change. March 4, 2008 Cameron Charles Slide 27

28 Category: Opamps Q: Which zeros are worse for stability: RHP or LHP, and why? A: RHP, since they reduce both the gain and the phase. March 4, 2008 Cameron Charles Slide 28

29 Category: Politics Q: Who is the current President of France? A: Nicolas Sarkozy. March 4, 2008 Cameron Charles Slide 29

30 Category: Opamps Q: Why do we include R C in our opamp compensation? A: To move the RHP zero into the LHP and increase the phase margin. March 4, 2008 Cameron Charles Slide 30

31 Category: Opamps Q: What are corner simulations, and when would you run them? A: Simulations to make sure that your design will work across all transistor speeds, run them when finalizing your design before fabrication. March 4, 2008 Cameron Charles Slide 31

32 Category: Personal Life Q: What is the best part of your day on Tuesdays and Thursdays? A: Attending Dr. Charles scintillating lectures. Q: What the heck does scintillating mean? A: to sparkle intellectually; brilliant and witty March 4, 2008 Cameron Charles Slide 32

ECE 3110: Midterm I Review GAMESHOW!!!

ECE 3110: Midterm I Review GAMESHOW!!! October 2, 2008 Gameshow Rules Divide into two teams (down the middle). Each question is assigned a point value. First person to put their hand up gets the first shot at answering the question, if they

More information

Analysis and Design of Analog Integrated Circuits Lecture 20. Advanced Opamp Topologies (Part II)

Analysis and Design of Analog Integrated Circuits Lecture 20. Advanced Opamp Topologies (Part II) Analysis and Design of Analog Integrated Circuits Lecture 20 Advanced Opamp Topologies (Part II) Michael H. Perrott April 15, 2012 Copyright 2012 by Michael H. Perrott All rights reserved. Outline of Lecture

More information

Lecture 2, Amplifiers 1. Analog building blocks

Lecture 2, Amplifiers 1. Analog building blocks Lecture 2, Amplifiers 1 Analog building blocks Outline of today's lecture Further work on the analog building blocks Common-source, common-drain, common-gate Active vs passive load Other "simple" analog

More information

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier Chapter 5 Operational Amplifiers and Source Followers 5.1 Operational Amplifier In single ended operation the output is measured with respect to a fixed potential, usually ground, whereas in double-ended

More information

Design of High-Speed Op-Amps for Signal Processing

Design of High-Speed Op-Amps for Signal Processing Design of High-Speed Op-Amps for Signal Processing R. Jacob (Jake) Baker, PhD, PE Professor and Chair Boise State University 1910 University Dr. Boise, ID 83725-2075 jbaker@ieee.org Abstract - As CMOS

More information

ECEN 474/704 Lab 5: Frequency Response of Inverting Amplifiers

ECEN 474/704 Lab 5: Frequency Response of Inverting Amplifiers ECEN 474/704 Lab 5: Frequency Response of Inverting Amplifiers Objective Design, simulate and layout various inverting amplifiers. Introduction Inverting amplifiers are fundamental building blocks of electronic

More information

Analysis and Design of Analog Integrated Circuits Lecture 8. Cascode Techniques

Analysis and Design of Analog Integrated Circuits Lecture 8. Cascode Techniques Analysis and Design of Analog Integrated Circuits Lecture 8 Cascode Techniques Michael H. Perrott February 15, 2012 Copyright 2012 by Michael H. Perrott All rights reserved. Review of Large Signal Analysis

More information

Index. Small-Signal Models, 14 saturation current, 3, 5 Transistor Cutoff Frequency, 18 transconductance, 16, 22 transit time, 10

Index. Small-Signal Models, 14 saturation current, 3, 5 Transistor Cutoff Frequency, 18 transconductance, 16, 22 transit time, 10 Index A absolute value, 308 additional pole, 271 analog multiplier, 190 B BiCMOS,107 Bode plot, 266 base-emitter voltage, 16, 50 base-emitter voltages, 296 bias current, 111, 124, 133, 137, 166, 185 bipolar

More information

INF3410 Fall Book Chapter 6: Basic Opamp Design and Compensation

INF3410 Fall Book Chapter 6: Basic Opamp Design and Compensation INF3410 Fall 2013 Compensation content Introduction Two Stage Opamps Compensation Slew Rate Systematic Offset Advanced Current Mirrors Operational Transconductance Amplifiers Current Mirror Opamps Folded

More information

Lecture 34: Designing amplifiers, biasing, frequency response. Context

Lecture 34: Designing amplifiers, biasing, frequency response. Context Lecture 34: Designing amplifiers, biasing, frequency response Prof J. S. Smith Context We will figure out more of the design parameters for the amplifier we looked at in the last lecture, and then we will

More information

Lecture 300 Low Voltage Op Amps (3/28/10) Page 300-1

Lecture 300 Low Voltage Op Amps (3/28/10) Page 300-1 Lecture 300 Low Voltage Op Amps (3/28/10) Page 300-1 LECTURE 300 LOW VOLTAGE OP AMPS LECTURE ORGANIZATION Outline Introduction Low voltage input stages Low voltage gain stages Low voltage bias circuits

More information

Lecture 33: Context. Prof. J. S. Smith

Lecture 33: Context. Prof. J. S. Smith Lecture 33: Prof J. S. Smith Context We are continuing to review some of the building blocks for multi-stage amplifiers, including current sources and cascode connected devices, and we will also look at

More information

Design of Analog CMOS Integrated Circuits

Design of Analog CMOS Integrated Circuits Design of Analog CMOS Integrated Circuits Behzad Razavi Professor of Electrical Engineering University of California, Los Angeles H Boston Burr Ridge, IL Dubuque, IA Madison, WI New York San Francisco

More information

Design and Layout of Two Stage High Bandwidth Operational Amplifier

Design and Layout of Two Stage High Bandwidth Operational Amplifier Design and Layout of Two Stage High Bandwidth Operational Amplifier Yasir Mahmood Qureshi Abstract This paper presents the design and layout of a two stage, high speed operational amplifiers using standard

More information

ECEN 474/704 Lab 6: Differential Pairs

ECEN 474/704 Lab 6: Differential Pairs ECEN 474/704 Lab 6: Differential Pairs Objective Design, simulate and layout various differential pairs used in different types of differential amplifiers such as operational transconductance amplifiers

More information

Design and Analysis of Low Power Two Stage CMOS Op- Amp with 50nm Technology

Design and Analysis of Low Power Two Stage CMOS Op- Amp with 50nm Technology Design and Analysis of Low Power Two Stage CMOS Op- Amp with 50nm Technology Swetha Velicheti, Y. Sandhyarani, P.Praveen kumar, B.Umamaheshrao Assistant Professor, Dept. of ECE, SSCE, Srikakulam, A.P.,

More information

Radivoje Đurić, 2015, Analogna Integrisana Kola 1

Radivoje Đurić, 2015, Analogna Integrisana Kola 1 OTA-output buffer 1 According to the types of loads, the driving capability of the output stages differs. For switched capacitor circuits which have high impedance capacitive loads, class A output stage

More information

ECE 415/515 ANALOG INTEGRATED CIRCUIT DESIGN

ECE 415/515 ANALOG INTEGRATED CIRCUIT DESIGN ECE 415/515 ANALOG INTEGRATED CIRCUIT DESIGN OPAMP DESIGN AND SIMULATION Vishal Saxena OPAMP DESIGN PROJECT R 2 v out v in /2 R 1 C L v in v out V CM R L V CM C L V CM -v in /2 R 1 C L (a) (b) R 2 ECE415/EO

More information

EE105 Fall 2015 Microelectronic Devices and Circuits

EE105 Fall 2015 Microelectronic Devices and Circuits EE105 Fall 2015 Microelectronic Devices and Circuits Multi-Stage Amplifiers Prof. Ming C. Wu wu@eecs.berkeley.edu 511 Sutardja Dai Hall (SDH) Terminal Gain and I/O Resistances of MOS Amplifiers Common

More information

Georgia Institute of Technology School of Electrical and Computer Engineering. Midterm Exam

Georgia Institute of Technology School of Electrical and Computer Engineering. Midterm Exam Georgia Institute of Technology School of Electrical and Computer Engineering Midterm Exam ECE-3400 Fall 2013 Tue, September 24, 2013 Duration: 80min First name Solutions Last name Solutions ID number

More information

Advanced Operational Amplifiers

Advanced Operational Amplifiers IsLab Analog Integrated Circuit Design OPA2-47 Advanced Operational Amplifiers כ Kyungpook National University IsLab Analog Integrated Circuit Design OPA2-1 Advanced Current Mirrors and Opamps Two-stage

More information

Reading. Lecture 33: Context. Lecture Outline. Chapter 9, multi-stage amplifiers. Prof. J. S. Smith

Reading. Lecture 33: Context. Lecture Outline. Chapter 9, multi-stage amplifiers. Prof. J. S. Smith eading Lecture 33: Chapter 9, multi-stage amplifiers Prof J. S. Smith Context Lecture Outline We are continuing to review some of the building blocks for multi-stage amplifiers, including current sources

More information

EE 501 Lab 4 Design of two stage op amp with miller compensation

EE 501 Lab 4 Design of two stage op amp with miller compensation EE 501 Lab 4 Design of two stage op amp with miller compensation Objectives: 1. Design a two stage op amp 2. Investigate how to miller compensate a two-stage operational amplifier. Tasks: 1. Build a two-stage

More information

A CMOS Low-Voltage, High-Gain Op-Amp

A CMOS Low-Voltage, High-Gain Op-Amp A CMOS Low-Voltage, High-Gain Op-Amp G N Lu and G Sou LEAM, Université Pierre et Marie Curie Case 203, 4 place Jussieu, 75252 Paris Cedex 05, France Telephone: (33 1) 44 27 75 11 Fax: (33 1) 44 27 48 37

More information

CHAPTER 8 DIFFERENTIAL AND MULTISTAGE AMPLIFIERS

CHAPTER 8 DIFFERENTIAL AND MULTISTAGE AMPLIFIERS CHAPTER 8 DIFFERENTIAL AND MULTISTAGE AMPLIFIERS Chapter Outline 8.1 The CMOS Differential Pair 8. Small-Signal Operations of the MOS Differential Pair 8.3 The BJT Differential Pair 8.4 Other Non-ideal

More information

INF3410 Fall Book Chapter 6: Basic Opamp Design and Compensation

INF3410 Fall Book Chapter 6: Basic Opamp Design and Compensation INF3410 Fall 2015 Book Chapter 6: Basic Opamp Design and Compensation content Introduction Two Stage Opamps Compensation Slew Rate Systematic Offset Advanced Current Mirrors Operational Transconductance

More information

ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS

ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS Fourth Edition PAUL R. GRAY University of California, Berkeley PAUL J. HURST University of California, Davis STEPHEN H. LEWIS University of California,

More information

Electronic Circuits for Mechatronics ELCT 609 Lecture 6: MOS-FET Transistor

Electronic Circuits for Mechatronics ELCT 609 Lecture 6: MOS-FET Transistor Electronic Circuits for Mechatronics ELCT 609 Lecture 6: MOS-FET Transistor Assistant Professor Office: C3.315 E-mail: eman.azab@guc.edu.eg 1 Introduction Why we call it Transistor? The name came as an

More information

F9 Differential and Multistage Amplifiers

F9 Differential and Multistage Amplifiers Lars Ohlsson 018-10-0 F9 Differential and Multistage Amplifiers Outline MOS differential pair Common mode signal operation Differential mode signal operation Large signal operation Small signal operation

More information

EECE488: Analog CMOS Integrated Circuit Design Set 7 Opamp Design

EECE488: Analog CMOS Integrated Circuit Design Set 7 Opamp Design EECE488: Analog CMOS Integrated Circuit Design Set 7 Opamp Design References: Analog Integrated Circuit Design by D. Johns and K. Martin and Design of Analog CMOS Integrated Circuits by B. Razavi All figures

More information

Rail to Rail Input Amplifier with constant G M and High Unity Gain Frequency. Arun Ramamurthy, Amit M. Jain, Anuj Gupta

Rail to Rail Input Amplifier with constant G M and High Unity Gain Frequency. Arun Ramamurthy, Amit M. Jain, Anuj Gupta 1 Rail to Rail Input Amplifier with constant G M and High Frequency Arun Ramamurthy, Amit M. Jain, Anuj Gupta Abstract A rail to rail input, 2.5V CMOS input amplifier is designed that amplifies uniformly

More information

Current Mirrors. Current Source and Sink, Small Signal and Large Signal Analysis of MOS. Knowledge of Various kinds of Current Mirrors

Current Mirrors. Current Source and Sink, Small Signal and Large Signal Analysis of MOS. Knowledge of Various kinds of Current Mirrors Motivation Current Mirrors Current sources have many important applications in analog design. For example, some digital-to-analog converters employ an array of current sources to produce an analog output

More information

Design and Simulation of Low Voltage Operational Amplifier

Design and Simulation of Low Voltage Operational Amplifier Design and Simulation of Low Voltage Operational Amplifier Zach Nelson Department of Electrical Engineering, University of Nevada, Las Vegas 4505 S Maryland Pkwy, Las Vegas, NV 89154 United States of America

More information

Lecture-45. MOS Field-Effect-Transistors Threshold voltage

Lecture-45. MOS Field-Effect-Transistors Threshold voltage Lecture-45 MOS Field-Effect-Transistors 7.4. Threshold voltage In this section we summarize the calculation of the threshold voltage and discuss the dependence of the threshold voltage on the bias applied

More information

Microelectronics Circuit Analysis and Design

Microelectronics Circuit Analysis and Design Microelectronics Circuit Analysis and Design Donald A. Neamen Chapter 3 The Field Effect Transistor Neamen Microelectronics, 4e Chapter 3-1 In this chapter, we will: Study and understand the operation

More information

Comparative Analysis of Compensation Techniques for improving PSRR of an OPAMP

Comparative Analysis of Compensation Techniques for improving PSRR of an OPAMP Comparative Analysis of Compensation Techniques for improving PSRR of an OPAMP 1 Pathak Jay, 2 Sanjay Kumar M.Tech VLSI and Embedded System Design, Department of School of Electronics, KIIT University,

More information

Basic OpAmp Design and Compensation. Chapter 6

Basic OpAmp Design and Compensation. Chapter 6 Basic OpAmp Design and Compensation Chapter 6 6.1 OpAmp applications Typical applications of OpAmps in analog integrated circuits: (a) Amplification and filtering (b) Biasing and regulation (c) Switched-capacitor

More information

What is the typical voltage gain of the basic two stage CMOS opamp we studied? (i) 20dB (ii) 40dB (iii) 80dB (iv) 100dB

What is the typical voltage gain of the basic two stage CMOS opamp we studied? (i) 20dB (ii) 40dB (iii) 80dB (iv) 100dB Department of Electronic ELEC 5808 (ELG 6388) Signal Processing Electronics Final Examination Dec 14th, 2010 5:30PM - 7:30PM R. Mason answer all questions one 8.5 x 11 crib sheets allowed 1. (5 points)

More information

ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS

ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS Fourth Edition PAUL R. GRAY University of California, Berkeley PAUL J. HURST University of California, Davis STEPHEN H. LEWIS University of California,

More information

Chapter 12 Opertational Amplifier Circuits

Chapter 12 Opertational Amplifier Circuits 1 Chapter 12 Opertational Amplifier Circuits Learning Objectives 1) The design and analysis of the two basic CMOS op-amp architectures: the two-stage circuit and the single-stage, folded cascode circuit.

More information

Revision History. Contents

Revision History. Contents Revision History Ver. # Rev. Date Rev. By Comment 0.0 9/15/2012 Initial draft 1.0 9/16/2012 Remove class A part 2.0 9/17/2012 Comments and problem 2 added 3.0 10/3/2012 cmdmprobe re-simulation, add supplement

More information

Analog Integrated Circuits. Lecture 7: OpampDesign

Analog Integrated Circuits. Lecture 7: OpampDesign Analog Integrated Circuits Lecture 7: OpampDesign ELC 601 Fall 2013 Dr. Ahmed Nader Dr. Mohamed M. Aboudina anader@ieee.org maboudina@gmail.com Department of Electronics and Communications Engineering

More information

Basic Circuits. Current Mirror, Gain stage, Source Follower, Cascode, Differential Pair,

Basic Circuits. Current Mirror, Gain stage, Source Follower, Cascode, Differential Pair, Basic Circuits Current Mirror, Gain stage, Source Follower, Cascode, Differential Pair, CCS - Basic Circuits P. Fischer, ZITI, Uni Heidelberg, Seite 1 Reminder: Effect of Transistor Sizes Very crude classification:

More information

Analog Integrated Circuit Design Exercise 1

Analog Integrated Circuit Design Exercise 1 Analog Integrated Circuit Design Exercise 1 Integrated Electronic Systems Lab Prof. Dr.-Ing. Klaus Hofmann M.Sc. Katrin Hirmer, M.Sc. Sreekesh Lakshminarayanan Status: 21.10.2015 Pre-Assignments The lecture

More information

MOSFET Amplifier Design

MOSFET Amplifier Design MOSFET Amplifier Design Introduction In this lab, you will design a basic 2-stage amplifier using the same 4007 chip as in lab 2. As a reminder, the PSpice model parameters are: NMOS: LEVEL=1, VTO=1.4,

More information

Chapter 11. Differential Amplifier Circuits

Chapter 11. Differential Amplifier Circuits Chapter 11 Differential Amplifier Circuits 11.0 ntroduction Differential amplifier or diff-amp is a multi-transistor amplifier. t is the fundamental building block of analog circuit. t is virtually formed

More information

Rail-To-Rail Output Op-Amp Design with Negative Miller Capacitance Compensation

Rail-To-Rail Output Op-Amp Design with Negative Miller Capacitance Compensation Rail-To-Rail Op-Amp Design with Negative Miller Capacitance Compensation Muhaned Zaidi, Ian Grout, Abu Khari bin A ain Abstract In this paper, a two-stage op-amp design is considered using both Miller

More information

A 16Ω Audio Amplifier with 93.8 mw Peak loadpower and 1.43 quiscent power consumption

A 16Ω Audio Amplifier with 93.8 mw Peak loadpower and 1.43 quiscent power consumption A 16Ω Audio Amplifier with 93.8 mw Peak loadpower and 1.43 quiscent power consumption IEEE Transactions on circuits and systems- Vol 59 No:3 March 2012 Abstract A class AB audio amplifier is used to drive

More information

ECEN 474/704 Lab 7: Operational Transconductance Amplifiers

ECEN 474/704 Lab 7: Operational Transconductance Amplifiers ECEN 474/704 Lab 7: Operational Transconductance Amplifiers Objective Design, simulate and layout an operational transconductance amplifier. Introduction The operational transconductance amplifier (OTA)

More information

ECE/CoE 0132: FETs and Gates

ECE/CoE 0132: FETs and Gates ECE/CoE 0132: FETs and Gates Kartik Mohanram September 6, 2017 1 Physical properties of gates Over the next 2 lectures, we will discuss some of the physical characteristics of integrated circuits. We will

More information

Gechstudentszone.wordpress.com

Gechstudentszone.wordpress.com UNIT 4: Small Signal Analysis of Amplifiers 4.1 Basic FET Amplifiers In the last chapter, we described the operation of the FET, in particular the MOSFET, and analyzed and designed the dc response of circuits

More information

For the purpose of this problem sheet use the model given in the lecture notes.

For the purpose of this problem sheet use the model given in the lecture notes. Analogue Electronics Questions Todd Huffman & Tony Weidberg, MT 2018 (updated 30/10/18). For the purpose of this problem sheet use the model given in the lecture notes. The current gain is defined by a

More information

6.976 High Speed Communication Circuits and Systems Lecture 5 High Speed, Broadband Amplifiers

6.976 High Speed Communication Circuits and Systems Lecture 5 High Speed, Broadband Amplifiers 6.976 High Speed Communication Circuits and Systems Lecture 5 High Speed, Broadband Amplifiers Michael Perrott Massachusetts Institute of Technology Copyright 2003 by Michael H. Perrott Broadband Communication

More information

Basic OpAmp Design and Compensation. Chapter 6

Basic OpAmp Design and Compensation. Chapter 6 Basic OpAmp Design and Compensation Chapter 6 6.1 OpAmp applications Typical applications of OpAmps in analog integrated circuits: (a) Amplification and filtering (b) Biasing and regulation (c) Switched-capacitor

More information

Lecture 21: Voltage/Current Buffer Freq Response

Lecture 21: Voltage/Current Buffer Freq Response Lecture 21: Voltage/Current Buffer Freq Response Prof. Niknejad Lecture Outline Last Time: Frequency Response of Voltage Buffer Frequency Response of Current Buffer Current Mirrors Biasing Schemes Detailed

More information

Design of High Gain Two stage Op-Amp using 90nm Technology

Design of High Gain Two stage Op-Amp using 90nm Technology Design of High Gain Two stage Op-Amp using 90nm Technology Shaik Aqeel 1, P. Krishna Deva 2, C. Mahesh Babu 3 and R.Ganesh 4 1 CVR College of Engineering/UG Student, Hyderabad, India 2 CVR College of Engineering/UG

More information

Microelectronics Circuit Analysis and Design. MOS Capacitor Under Bias: Electric Field and Charge. Basic Structure of MOS Capacitor 9/25/2013

Microelectronics Circuit Analysis and Design. MOS Capacitor Under Bias: Electric Field and Charge. Basic Structure of MOS Capacitor 9/25/2013 Microelectronics Circuit Analysis and Design Donald A. Neamen Chapter 3 The Field Effect Transistor In this chapter, we will: Study and understand the operation and characteristics of the various types

More information

Experiment #6 MOSFET Dynamic circuits

Experiment #6 MOSFET Dynamic circuits Experiment #6 MOSFET Dynamic circuits Jonathan Roderick Introduction: This experiment will build upon the concepts that were presented in the previous lab and introduce dynamic circuits using MOSFETS.

More information

You will be asked to make the following statement and provide your signature on the top of your solutions.

You will be asked to make the following statement and provide your signature on the top of your solutions. 1 EE 435 Name Exam 1 Spring 2018 Instructions: The points allocated to each problem are as indicated. Note that the first and last problem are weighted more heavily than the rest of the problems. On those

More information

Radivoje Đurić, 2015, Analogna Integrisana Kola 1

Radivoje Đurić, 2015, Analogna Integrisana Kola 1 Low power OTA 1 Two-Stage, Miller Op Amp Operating in Weak Inversion Low frequency response: gm1 gm6 Av 0 g g g g A v 0 ds2 ds4 ds6 ds7 I D m, ds D nvt g g I n GB and SR: GB 1 1 n 1 2 4 6 6 7 g 2 2 m1

More information

University of Southern C alifornia School Of Engineering Department Of Electrical Engineering

University of Southern C alifornia School Of Engineering Department Of Electrical Engineering University of Southern C alifornia School Of Engineering Department Of Electrical Engineering EE 348: Homework Assignment #08 Spring, 2001 (Due 04/26/2001) Choma Problem #35: The NMOS transistors in the

More information

EE70 - Intro. Electronics

EE70 - Intro. Electronics EE70 - Intro. Electronics Course website: ~/classes/ee70/fall05 Today s class agenda (November 28, 2005) review Serial/parallel resonant circuits Diode Field Effect Transistor (FET) f 0 = Qs = Qs = 1 2π

More information

Basic Electronics Prof. Dr. Chitralekha Mahanta Department of Electronics and Communication Engineering Indian Institute of Technology, Guwahati

Basic Electronics Prof. Dr. Chitralekha Mahanta Department of Electronics and Communication Engineering Indian Institute of Technology, Guwahati Basic Electronics Prof. Dr. Chitralekha Mahanta Department of Electronics and Communication Engineering Indian Institute of Technology, Guwahati Module: 3 Field Effect Transistors Lecture-7 High Frequency

More information

Applied Electronics II

Applied Electronics II Applied Electronics II Chapter 2: Differential Amplifier School of Electrical and Computer Engineering Addis Ababa Institute of Technology Addis Ababa University Daniel D./Abel G. April 4, 2016 Chapter

More information

Introduction to MOSFET MOSFET (Metal Oxide Semiconductor Field Effect Transistor)

Introduction to MOSFET MOSFET (Metal Oxide Semiconductor Field Effect Transistor) Microelectronic Circuits Introduction to MOSFET MOSFET (Metal Oxide Semiconductor Field Effect Transistor) Slide 1 MOSFET Construction MOSFET (Metal Oxide Semiconductor Field Effect Transistor) Slide 2

More information

Field-Effect Transistor (FET) is one of the two major transistors; FET derives its name from its working mechanism;

Field-Effect Transistor (FET) is one of the two major transistors; FET derives its name from its working mechanism; Chapter 3 Field-Effect Transistors (FETs) 3.1 Introduction Field-Effect Transistor (FET) is one of the two major transistors; FET derives its name from its working mechanism; The concept has been known

More information

Prof. Paolo Colantonio a.a

Prof. Paolo Colantonio a.a Prof. Paolo Colantonio a.a. 20 2 Field effect transistors (FETs) are probably the simplest form of transistor, widely used in both analogue and digital applications They are characterised by a very high

More information

INTRODUCTION TO ELECTRONICS EHB 222E

INTRODUCTION TO ELECTRONICS EHB 222E INTRODUCTION TO ELECTRONICS EHB 222E MOS Field Effect Transistors (MOSFETS II) MOSFETS 1/ INTRODUCTION TO ELECTRONICS 1 MOSFETS Amplifiers Cut off when v GS < V t v DS decreases starting point A, once

More information

An Analog Phase-Locked Loop

An Analog Phase-Locked Loop 1 An Analog Phase-Locked Loop Greg Flewelling ABSTRACT This report discusses the design, simulation, and layout of an Analog Phase-Locked Loop (APLL). The circuit consists of five major parts: A differential

More information

ECEN 5008: Analog IC Design. Final Exam

ECEN 5008: Analog IC Design. Final Exam ECEN 5008 Initials: 1/10 ECEN 5008: Analog IC Design Final Exam Spring 2004 Instructions: 1. Exam Policy: Time-limited, 150-minute exam. When the time is called, all work must stop. Put your initials on

More information

Electronic Circuits. Junction Field-effect Transistors. Dr. Manar Mohaisen Office: F208 Department of EECE

Electronic Circuits. Junction Field-effect Transistors. Dr. Manar Mohaisen Office: F208   Department of EECE Electronic Circuits Junction Field-effect Transistors Dr. Manar Mohaisen Office: F208 Email: manar.subhi@kut.ac.kr Department of EECE Review of the Precedent Lecture Explain the Operation Class A Power

More information

ECE 546 Lecture 12 Integrated Circuits

ECE 546 Lecture 12 Integrated Circuits ECE 546 Lecture 12 Integrated Circuits Spring 2018 Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jesa@illinois.edu ECE 546 Jose Schutt Aine 1 Integrated Circuits IC Requirements

More information

ECEN 474/704 Lab 8: Two-Stage Miller Operational Amplifier

ECEN 474/704 Lab 8: Two-Stage Miller Operational Amplifier ECEN 474/704 Lab 8: Two-Stage Miller Operational Amplifier Objective Design, simulate and test a two-stage operational amplifier Introduction Operational amplifiers (opamp) are essential components of

More information

MOSFET Terminals. The voltage applied to the GATE terminal determines whether current can flow between the SOURCE & DRAIN terminals.

MOSFET Terminals. The voltage applied to the GATE terminal determines whether current can flow between the SOURCE & DRAIN terminals. MOSFET Terminals The voltage applied to the GATE terminal determines whether current can flow between the SOURCE & DRAIN terminals. For an n-channel MOSFET, the SOURCE is biased at a lower potential (often

More information

Design Of Two Stage CMOS Op-Amp With Low Power And High Slew Rate.

Design Of Two Stage CMOS Op-Amp With Low Power And High Slew Rate. Design Of Two Stage CMOS Op-Amp With Low Power And High Slew Rate. P.K.SINHA, Assistant Professor, Department of ECE, MAIT, Delhi ABHISHEK VIKRAM, Research Intern, Robospecies Technologies Pvt. Ltd.,Noida

More information

d. Can you find intrinsic gain more easily by examining the equation for current? Explain.

d. Can you find intrinsic gain more easily by examining the equation for current? Explain. EECS140 Final Spring 2017 Name SID 1. [8] In a vacuum tube, the plate (or anode) current is a function of the plate voltage (output) and the grid voltage (input). I P = k(v P + µv G ) 3/2 where µ is a

More information

A low voltage rail-to-rail operational amplifier with constant operation and improved process robustness

A low voltage rail-to-rail operational amplifier with constant operation and improved process robustness Graduate Theses and Dissertations Graduate College 2009 A low voltage rail-to-rail operational amplifier with constant operation and improved process robustness Rien Lerone Beal Iowa State University Follow

More information

A Compact 2.4V Power-efficient Rail-to-rail Operational Amplifier. Strong inversion operation stops a proposed compact 3V power-efficient

A Compact 2.4V Power-efficient Rail-to-rail Operational Amplifier. Strong inversion operation stops a proposed compact 3V power-efficient A Compact 2.4V Power-efficient Rail-to-rail Operational Amplifier Abstract Strong inversion operation stops a proposed compact 3V power-efficient rail-to-rail Op-Amp from a lower total supply voltage.

More information

Chapter 4. CMOS Cascode Amplifiers. 4.1 Introduction. 4.2 CMOS Cascode Amplifiers

Chapter 4. CMOS Cascode Amplifiers. 4.1 Introduction. 4.2 CMOS Cascode Amplifiers Chapter 4 CMOS Cascode Amplifiers 4.1 Introduction A single stage CMOS amplifier cannot give desired dc voltage gain, output resistance and transconductance. The voltage gain can be made to attain higher

More information

ISSN:

ISSN: 468 Modeling and Design of a CMOS Low Drop-out (LDO) Voltage Regulator PRIYADARSHINI JAINAPUR 1, CHIRAG SHARMA 2 1 Department of E&CE, Nitte Meenakshi Institute of Technology, Yelahanka, Bangalore-560064,

More information

Performance Analysis of Low Power, High Gain Operational Amplifier Using CMOS VLSI Design

Performance Analysis of Low Power, High Gain Operational Amplifier Using CMOS VLSI Design RESEARCH ARTICLE OPEN ACCESS Performance Analysis of Low Power, High Gain Operational Amplifier Using CMOS VLSI Design Ankush S. Patharkar*, Dr. Shirish M. Deshmukh** *(Department of Electronics and Telecommunication,

More information

444 Index. F Fermi potential, 146 FGMOS transistor, 20 23, 57, 83, 84, 98, 205, 208, 213, 215, 216, 241, 242, 251, 280, 311, 318, 332, 354, 407

444 Index. F Fermi potential, 146 FGMOS transistor, 20 23, 57, 83, 84, 98, 205, 208, 213, 215, 216, 241, 242, 251, 280, 311, 318, 332, 354, 407 Index A Accuracy active resistor structures, 46, 323, 328, 329, 341, 344, 360 computational circuits, 171 differential amplifiers, 30, 31 exponential circuits, 285, 291, 292 multifunctional structures,

More information

EE Analog and Non-linear Integrated Circuit Design

EE Analog and Non-linear Integrated Circuit Design University of Southern California Viterbi School of Engineering Ming Hsieh Department of Electrical Engineering EE 479 - Analog and Non-linear Integrated Circuit Design Instructor: Ali Zadeh Email: prof.zadeh@yahoo.com

More information

Analog CMOS Interface Circuits for UMSI Chip of Environmental Monitoring Microsystem

Analog CMOS Interface Circuits for UMSI Chip of Environmental Monitoring Microsystem Analog CMOS Interface Circuits for UMSI Chip of Environmental Monitoring Microsystem A report Submitted to Canopus Systems Inc. Zuhail Sainudeen and Navid Yazdi Arizona State University July 2001 1. Overview

More information

Design of a Folded Cascode Operational Amplifier in a 1.2 Micron Silicon-Carbide CMOS Process

Design of a Folded Cascode Operational Amplifier in a 1.2 Micron Silicon-Carbide CMOS Process University of Arkansas, Fayetteville ScholarWorks@UARK Electrical Engineering Undergraduate Honors Theses Electrical Engineering 5-2017 Design of a Folded Cascode Operational Amplifier in a 1.2 Micron

More information

Voltage Feedback Op Amp (VF-OpAmp)

Voltage Feedback Op Amp (VF-OpAmp) Data Sheet Voltage Feedback Op Amp (VF-OpAmp) Features 55 db dc gain 30 ma current drive Less than 1 V head/floor room 300 V/µs slew rate Capacitive load stable 40 kω input impedance 300 MHz unity gain

More information

Electronics Prof. D. C. Dube Department of Physics Indian Institute of Technology, Delhi

Electronics Prof. D. C. Dube Department of Physics Indian Institute of Technology, Delhi Electronics Prof. D. C. Dube Department of Physics Indian Institute of Technology, Delhi Module No # 05 FETS and MOSFETS Lecture No # 06 FET/MOSFET Amplifiers and their Analysis In the previous lecture

More information

Operational Amplifier with Two-Stage Gain-Boost

Operational Amplifier with Two-Stage Gain-Boost Proceedings of the 6th WSEAS International Conference on Simulation, Modelling and Optimization, Lisbon, Portugal, September 22-24, 2006 482 Operational Amplifier with Two-Stage Gain-Boost FRANZ SCHLÖGL

More information

6.776 High Speed Communication Circuits Lecture 7 High Freqeuncy, Broadband Amplifiers

6.776 High Speed Communication Circuits Lecture 7 High Freqeuncy, Broadband Amplifiers 6.776 High Speed Communication Circuits Lecture 7 High Freqeuncy, Broadband Amplifiers Massachusetts Institute of Technology February 24, 2005 Copyright 2005 by Hae-Seung Lee and Michael H. Perrott High

More information

Current Mirrors. Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 4-1

Current Mirrors. Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 4-1 Current Mirrors Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 4- 郭泰豪, Analog C Design, 08 { Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 4- 郭泰豪, Analog C Design, 08 { Current Source and Sink Symbol

More information

Lecture 16: MOS Transistor models: Linear models, SPICE models. Context. In the last lecture, we discussed the MOS transistor, and

Lecture 16: MOS Transistor models: Linear models, SPICE models. Context. In the last lecture, we discussed the MOS transistor, and Lecture 16: MOS Transistor models: Linear models, SPICE models Context In the last lecture, we discussed the MOS transistor, and added a correction due to the changing depletion region, called the body

More information

A Compact Folded-cascode Operational Amplifier with Class-AB Output Stage

A Compact Folded-cascode Operational Amplifier with Class-AB Output Stage A Compact Folded-cascode Operational Amplifier with Class-AB Output Stage EEE 523 Advanced Analog Integrated Circuits Project Report Fuding Ge You are an engineer who is assigned the project to design

More information

EEC 118 Spring 2010 Lab #1: NMOS and PMOS Transistor Parameters

EEC 118 Spring 2010 Lab #1: NMOS and PMOS Transistor Parameters EEC 118 Spring 2010 Lab #1: NMOS and PMOS Transistor Parameters Dept. of Electrical and Computer Engineering University of California, Davis March 18, 2010 Reading: Rabaey Chapter 3 [1]. Reference: Kang

More information

Experiment #7 MOSFET Dynamic Circuits II

Experiment #7 MOSFET Dynamic Circuits II Experiment #7 MOSFET Dynamic Circuits II Jonathan Roderick Introduction The previous experiment introduced the canonic cells for MOSFETs. The small signal model was presented and was used to discuss the

More information

Sensors & Transducers Published by IFSA Publishing, S. L.,

Sensors & Transducers Published by IFSA Publishing, S. L., Sensors & Transducers Published by IFSA Publishing, S. L., 208 http://www.sensorsportal.com Fully Differential Operation Amplifier Using Self Cascode MOSFET Structure for High Slew Rate Applications Kalpraj

More information

Low-Voltage Wide Linear Range Tunable Operational Transconductance Amplifier

Low-Voltage Wide Linear Range Tunable Operational Transconductance Amplifier Low-Voltage Wide Linear Range Tunable Operational Transconductance Amplifier A dissertation submitted in partial fulfillment of the requirement for the award of degree of Master of Technology in VLSI Design

More information

Lecture 350 Low Voltage Op Amps (3/26/02) Page 350-1

Lecture 350 Low Voltage Op Amps (3/26/02) Page 350-1 Lecture 350 Low Voltage Op Amps (3/26/02) Page 3501 LECTURE 350 LOW VOLTAGE OP AMPS (READING: AH 415432) Objective The objective of this presentation is: 1.) How to design standard circuit blocks with

More information

Q.1: Power factor of a linear circuit is defined as the:

Q.1: Power factor of a linear circuit is defined as the: Q.1: Power factor of a linear circuit is defined as the: a. Ratio of real power to reactive power b. Ratio of real power to apparent power c. Ratio of reactive power to apparent power d. Ratio of resistance

More information

EE 435. Lecture 7: Signal Swing Measurement/Simulation of High Gain Circuits Laboratory Support

EE 435. Lecture 7: Signal Swing Measurement/Simulation of High Gain Circuits Laboratory Support EE 435 Lecture 7: Signal Swing Measurement/Simulation of High Gain Circuits Laboratory Support 1 Review from last lecture: Operation of Op Amp A different perspective D D DD Small signal differential half-circuit

More information

I E I C since I B is very small

I E I C since I B is very small Figure 2: Symbols and nomenclature of a (a) npn and (b) pnp transistor. The BJT consists of three regions, emitter, base, and collector. The emitter and collector are usually of one type of doping, while

More information