A CMOS Image Sensor With Dark-Current Cancellation and Dynamic Sensitivity Operations
|
|
- Myrtle Barker
- 6 years ago
- Views:
Transcription
1 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 1, JANUARY A CMOS Image Sensor With Dark-Current Cancellation and Dynamic Sensitivity Operations Hsiu-Yu Cheng and Ya-Chin King, Member, IEEE Abstract An ultralow dark-signal and high-sensitivity pixel has been developed for an embedded active-pixel CMOS image sensor by using a standard m CMOS logic process. To achieve in-pixel dark-current cancellation, we developed a combined photogate/photodiode photon sensing device with a novel operation scheme. The experimental results demonstrate that the severe dark signal degradation of a CMOS active pixel sensor is reduced more than an order of magnitude. Through varying the bias conditions on the photogate, dynamic sensitivity can be obtained to increase maximum allowable illumination level. Combining the above two operation schemes, the dynamic range of this new cell can be extended by more than 20. Index Terms CMOS image sensor, dark current, dynamic range. I. INTRODUCTION CHARGE couple device (CCD) image sensors have shown overwhelmingly superior performances in the various digital imaging applications over a period of time. The predominant reason is the extending market demand for better image quality and eternally larger resolution, which no other technology could perform better than CCDs [1] [4]. With the rapid advances in CMOS technology, the evolution of image sensors based on CMOS logic process has been the subject of many studies in the past ten years. CMOS active pixel sensors (APSs) have the advantages of lower electric power consumption due to lower voltage supply, compatibility with standard CMOS processes, and possibly lower cost [5] [8]. Inherited performance limitations in the CMOS APS have confined its applications to medium-to-low-quality imaging such as fingerprint sensors, motion detect sensors, and low-end cameras. Major disadvantages of the CMOS APS are large dark signal level and low dynamic range, which become the most critical hurdles for achieving-high performance CMOS APS imagers [9] [12]. In recent development, CCD-based sensors using an optical fabrication process and advanced dark current management techniques outperform the CMOS APS by at least a factor of 10 in the dark-signal level [13], [14]. It is thus essential to establish simple and precise methods of suppressing dark signal in current CMOS APS systems to achieve high-quality imaging performance comparable to that of CCDs. Manuscript received March 26, 2002; revised October 22, This work was supported by the Twin Han Corporation and the National Science Council of Taiwan, R.O.C. The review of this paper was arranged by Editor A. Theuwissen. The authors are with the Department of Electrical Engineering, National Tsing Hua University, Hsinchu 300, Taiwan, R.O.C. ( sychen@well.ee.nthu.edu.tw; ycking@ee.nthu.edu.tw) Digital Object Identifier /TED In this paper, an extraordinary low dark-signal pixel that has been implemented in a standard 0.35 m CMOS logic process is developed. Furthermore, we propose two operational schemes in combination with the novel sensor cell design to a dynamic range extension by 2. Effects of various structure parameters and operation schemes are investigated for further optimization of the cell structure and operation scheme. II. NEW PIXEL STRUCTURE AND OPERATION The architecture of the image sensor and the column dual signal-subtaction circuit schematic are shown in Fig. 1. The conventional three-transistor active pixel configuration is employed with our new sensing structure. The photon-sensing device is composed of a photogate (PG) and an n photodiode ring. Fig. 2 shows the corresponding pixel layout. The new proposed operation scheme is illustrated by the timing diagram in Fig. 3. In contrast with typical timing sequence, two reset cycles are included in one integration period. At the beginning, the photodiode (PD) node of the pixels are reset to a voltage approximately one threshold voltage drop below V by pulsing the reset gate (Rst) high. During the first reset cycle, a positive voltage is applied to the PG right after the reset pulse. Thus, the electrons excited by the photon are both generated in the depletion region beneath the photogate oxide and by the n photodiode. When the PG is bias returned to 0 V at the end of the applied pulse, the electrons attracted by the positive PG are then transferred to an adjacent n p junction capacitor. Within this period, the new sensing device works as a combination of PG and photodiode. During the second reset cycle, the bias voltage on the PG is held at 0 V. Consequently, the photon-sensing device functions as a simple photodiode of which carriers are mainly generated and collected in the depletion region of the n to a p-well junction. During sensor read-out, each row is addressed in turn with decoding logic (not shown in Fig. 1 driving the appropriate row line, ROW, to V. The final signals sampled at the end of the two-reset cycle, designated as V and V, are separately stored in the capacitors C and C of the dual signal-subtraction stage with timing sequences as shown in Fig. 3. The fixed pattern noise (FPN) due to variation in the threshold voltages of M1 and M2 is thus cancelled. The sampled output voltage in the end of two different operation reset intervals can thus be expressed as follows: (1) (2) where S and S are the corresponding optical sensitivities under different PG biasing conditions, V and V rep /03$ IEEE
2 92 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 1, JANUARY 2003 Fig. 1. Pixel and column dual signal-subtraction circuit schematic of the proposed CMOS image sensor. Fig. 2. Layout of the novel cell combining PG and photodiode. Fig. 4. Illustration of the new operation scheme with the final signal as 1V 0 1V. depletion region remains almost unaffected. Also, in our timing design, t is identical for collecting V and V. The dark signals are expected to be close to identical for the two reset cycles. Consequently, the unwanted dark signals including their variation can be canceled in the output voltage through the subtracting operation by the op-amp (3) Fig. 3. Timing diagram of the new operation scheme in which t = 1ms, tp =0:5ms, and t I =2ms. resents the dark voltage drop at the first and second reset cycles, respectively, L is the illumination intensity, and t is the reset cycle time, one half of the integration period. The dark-signal variation of the photon-sensing device appears in the output signal, which cannot be removed with a signal-subtraction operation. Since the dark signals reflect the total charge leakage during the integration period, the dark signal nonuniformity components also contribute to the outputs, V and V.In many prior studies [15] [18], it has been shown that the dark current in the CMOS APS cell mainly results from the leakage current in the surface depletion region. By applying different bias voltages on the PG in the two reset cycles, the surface Fig. 4 shows the ideal sensitivity curves before and after the dual signal-subtraction cancellation circuits. Even though the overall sensitivity might be reduced, as illustrated in Fig. 4, V can be completely removed. III. SAMPLE FABRICATION AND MEASUREMENT CONDITION The sensor test structures with pixel dimensions of m m was fabricated by TSMC 0.35 m standard CMOS logic process. For the purpose of higher quantum efficiency and spectral sensitivity, a resist protection oxide (RPO) mask is used to define nonsilicide region, i.e., the photon-sensing area. A 500- s reset pulse at 3.3 V with extended integration period (500 ms) is used to extract the dark voltages. To determine the spectral sensitivity of the sensor pixel, a tungsten halogen lamp and integration sphere were used to provide a uniform source of
3 CHENG AND KING: CMOS IMAGE SENSOR WITH DARK-CURRENT CANCELLATION 93 Fig. 5. Cumulative probability of the pixel dark signal for a basic n /p diode and new cell structure. Fig. 7. Dependence of pixel sensitivity on the area ratio of PG to PD at t =t =2/3. Fig. 6. Cumulative probability of the cell sensitivity for two photon-sensing structures with or without RPO. illumination. A color-compensating filter was employed to suppress any infrared signal. IV. RESULTS AND DISCUSSIONS A. Sensor Performance The distribution of the cumulative probability of the measured pixel dark current for the conventional and new cell is compared in Fig. 5. It is found that the dark-current level is reduced by more than one order of magnitude to the level comparable to that reported for CCD-based imagers [5]. Moreover, the standard variation of the dark current itself is also drastically reduced from 10 to 0.74 na/cm. The high FPN of a conventional CMOS APS caused by dark current nonuniformity at low illumination levels is greatly reduced. It is reported that the lower quantum efficiency of the PG sensor, particularly at short wavelengths, is largely due to absorption in the gate poly-silicon [13], [19]. Along with the dual signal-subtraction circuit, the spectral sensitivity of the new structure is expected to decrease. However, the sensitivity of the new structure is found to be similar to that of the conventional photodiode from the measurement results demonstrated in Fig. 6. The charge conversion gain for the conventional and novel cell are 7.91 and 7.64 V/e, respectively, which agreed with the capacitance of the floating node ( 3 ff) calculated from the layout. The photon-induced electrons beneath the PG are transferred to the carrier-collecting node (n /p-well diffusion) with relatively smaller capacitance in comparison with the typical photodiode. The magnitude of the spectral Fig. 8. Dependence of pixel dark signal on the area ratio of a PG to a PD at t =t =2/3. sensitivity of the novel cell thus remains at the same level as the conventional ones. Dynamic range (DR) quantifies the ability of an image sensor to adequately image both high and low illuminations in the same scene or setup configuration. It is defined as the ratio of the largest nonsaturating input signal to the smallest detectable input signal. Using the photon induced current to represent the input signal, the largest nonsaturating signal is given by, where is the (effective) charge capacity, is the dark current, and is the integration time. Also, the smallest detectable input signal is usually defined as the standard deviation of the input-referred noise under dark conditions, which gives, where is the total noise due to reset and readout operation. Thus, the dynamic range of the new cell structure is expected to increase as a result of the rising and falling. Our measurement results demonstrate that the DR of the new pixel with the dual signal-subtraction operation scheme is improved by 15 db in comparison with a conventional CMOS APS. B. PG Structure Optimization The new photon-sensing device functions as the mixture of PG and photodiode during the first reset cycle. Consequently, the amount of carriers induced by the running of the PG determines the quantity of the sensitivity. To maximize the sensitivity difference between two reset cycles, the larger layout area ratio of the PG to the diode junction is preferable. Figs. 7 and 8 illustrate the dependencies of the pixel sensitivity and dark signal on the area ratio of the photogate (PG)
4 94 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 1, JANUARY 2003 Fig. 9. Dependence of pixel dynamic range on the area ratio of the PG to PD at t =t =2/3. Fig. 11. Dependence of pixel sensitivity on the PG bias voltage conditions. Fig. 10. Effect of PG bias pulse duration on sensitivity and dark signal at an area ratio equal to 1. Fig. 12. Measured output signal 1V +1V versus different illumination intensities. to the photodiode (PD). Apparently, higher pixel sensitivity can be obtained by further increasing the PG/PD area ratio at the cost of a slight increase in dark signal. However, the maximum charge capacity decreases as the area of the electron-collecting node (n /p photodiode junction) decreases. Therefore, the spectral dynamic range degrades slightly with an increased PG/PD ratio, as shown in Fig. 9. C. PG Bias Pulse Design To achieve a reasonable spectral sensitivity and dark-signal level comparable to other noise sources in the CMOS APS, the PG bias pulse optimization is required. One of the parameters that can easily be controlled is the pulse duration. With longer PG pulse duration, not only do the photon-induced carriers increase, but the excess charge accumulated by dark current increases as well. Thus, both the pixel sensitivity and dark signal level are expected to be higher. Fig. 10 illustrates the dependencies of the pixel sensitivity and dark signal on the PG pulse duty cycle. It is found that, with a 1.5 increase in PG pulsewidth, the spectral sensitivity is raised by 80% while the dark signal is increased by 3. Thus, the PG pulsewidth can be designed differently to meet different requirements in sensitivity, DR, and dark noise for better image quality or higher contrast in various applications. D. Adjustable Sensitivity and DR Extension It is observed that different PG bias conditions lead to variable sensitivity. With the 50% duty cycle PG pulse applied, the sensitivity increases by about 2 when the PG bias height rises to 3.3 V (as shown in Fig. 11). This is mainly due to the photon-sensing depletion region extending with higher bias voltage on the PG. However, the trend is completely the opposite when the PG is biased with a fixed positive voltage. This is because more photon-induced electrons are collected to form the inversion layer under the photogate with the fixed positive PG bias. Therefore, less charge is available to the n diffusion output node. Consequently, the sensitivity decreases about 5 as the fixed bias voltage goes up to 3.3 V. The ability to control spectrum sensitivity enables us to adapt different approaches to extend the relatively poor DR of CMOS-based imagers. By summing the output signals from two successive reset cycles and, the sensor can reflect high sensitivity at a low light intensity, whereas they exhibit low sensitivity at a high light intensity. The addition can be done either with an on-chip adder or by off-chip image processing. For example, a PG is applied with a 50% duty cycle at 3.3-V positive pulse during the first rest cycle and with a fixed 3.3-V bias throughout the second. A DR about 10 times larger can thus be obtained by means of adding two outputs (as illustrated in Fig. 12). Even though the dark signal level is doubled, the imager exhibits a better spectral sensitivity at a low light intensity as well. An in-pixel approach is to employ a special circuit, which can apply a bias voltage according to the light intensity. The pixel output signal is connected to the bias voltage on a PG through a feedback trigger circuit, as illustrated in Fig. 13. With a proper design of the low-to-high trigger point of the circuit (e.g., 1 V),
5 CHENG AND KING: CMOS IMAGE SENSOR WITH DARK-CURRENT CANCELLATION 95 Fig. 13. Proposed pixel schematic with a trigger circuit and its transfer curve. TABLE I PIXEL PERFORMANCE COMPARISON the PG will be pumped to a fixed positive bias at a high light intensity. Sensitivity can be reduced at high light intensity levels, thus the output signals saturate at a higher extended light intensity. The DR is improved as well. However, the main drawback of this technique is that more transistors per pixel is required, resulting in larger pixel sizes or a smaller fill factor. The performance comparison of the conventional photodiode pixel and the new cell with different operation schemes is summarized in Table I. V. CONCLUSION A novel CMOS image sensor implemented in a standard CMOS logic m process was proposed. The pixels with a novel photon-sensing device and operation scheme can reduce the dark signal to a level comparable to CCD-based imagers. By optimizing the PG/PD area ratio and the bias pulse, the imaging sensitivity can be further improved for high-speed capture operation. The maximum saturated signal can be extended by variable sensitivity control. The new CMOS image sensor with a high DR and low dark signal is a very promising candidate for a high-quality imager in SOC system. [5] J. P. Albert Theuwissen, CCD or CMOS image sensors for consumer digital still photography?, presented at the 2001 Int. Symp. on VLSI Technology, Systems, and Applications, Hsinchu, Taiwan, R.O.C., Apr. 2001, pp [6] E. R. Fossum, CMOS image sensors: Electronic camera-on-a-chip, IEEE Trans. Electron Devices, vol. 44, pp , Oct [7] H. S. P. Wong, CMOS image sensors Recent advances and device scaling considerations, in IEDM Tech. Dig., 1997, pp [8] S. K. Mendis, S. E. Kemeny, R. C. Gee, B. Pain, Q. Kim, and E. R. Fossum, CMOS active pixel image sensors for highly integrated imaging systems, IEEE J. Solid-State Circuits, vol. 32, pp , Feb [9] P. Lee, R. Gee, M. Guidash, T. Lee, and E. R. Fossum. An active pixel sensor fabricated using CMOS/ CCD process technology. presented at 1995 IEEE Workshop on CCDs and Advanced Image Sensors [10] H. S. P. Wong, R. T. Chang, E. Crabbe, and P. D. Agnello, CMOS active pixel image sensors fabricated using a 1.8-V, 0.25-m CMOS technology, IEEE Trans. Electron Devices, vol. 45, pp , Apr [11] S. Mendis, S. E. Kemeny, R. Gee, B. Pain, and E. R. Fossum, Progress in CMOS active pixel image sensors, Proc. SPIE, vol. 2172, pp , [12] J. Woo, D. J. Min, J. Kim, and W. Kim, A 600-dpi capacitive fingerprint sensor chip and image synthesis technique, IEEE J. Solid-State Circuits, vol. 34, pp , [13] A. J. Blanksby and M. J. Loinaz, Performance analysis of a color CMOS photogate image sensor, IEEE Trans. Electron Devices, vol. 47, pp , Jan [14] W. Zhang and M. Chan, Properties and design optimization of photodiodes available in a current CMOS technology, in Proc. IEEE Hong Kong Electron Devices Meeting, 1998, pp [15] H. D. Lee and J. M. Hwang, Accurate extraction of reverse leakage current components of shallow silicided p+0n junction for quarter and subquarter-micron MOSFETs, IEEE Trans. Electron Devices, vol. 45, pp , Aug [16] S. N. Hong, G. A. Ruggles, J. J. Wortman, and M. C. Ozturk, Material and electrical properties of ultra-shallow p+0n junctions formed by low-energy ion implantation and thermal annealing, IEEE Trans. Electron Devices, vol. 38, pp , [17] B. Y. Tsui, Y. F. Hsieh, and C. H. Chang, Impact of Structure Enhanced Defects Multiplication in Junction Leakage, in IEEE IRPS Tech. Dig., 1994, pp [18] H. Lee, Y. Huh, J. S. Goo, S. D. Lee, D. Yang, and W. Kim, A new leakage component caused by the interaction of residual stress and the relative position of poly-si gate at isolation edge, in IEDM Tech. Dig., 1995, pp [19] T. Lule, S. Benthien, H. Keller, F. Mutze, P. Rieve, K. Seibel, M. Sommer, and M. Bohm, Sensitivity of CMOS based imager and scaling perspectives, IEEE Trans. Electron Devices, vol. 47, pp , Hsiu-Yu Cheng was born in Taiwan, R.O.C. He received the B.S. and M.S. degrees in electrical engineering from National Tsing-Hua University, Hsinchu, Taiwan, in 2000 and 2002, respectively. He is currently serving in the R.O.C. army. His research interests include embedded CMOS image sensor design, imager sensor characterization, and analog circuit design. REFERENCES [1] E. R. Fossum, CMOS image sensors: electronic camera-on-a-chip, in IEDM Tech. Dig., 1995, pp [2] B. Ackland and A. Dickinson, Camera-on-a-chip, 1996 ISSCD Tech. Dig., pp , [3] S. K. Mendis, S. E. Kemeny, R. C. Gee, B. Pain, Q. Kim, and E. R. Fossum, CMOS active pixel image sensors for highly integrated imaging systems, IEEE J. Solid-State Circuits, vol. 32, pp , Feb [4] R. H. Nixon, S. E. Kemeny, B. Pain, C. O. Staller, and E. R. Fossum, CMOS active pixel sensor camera-on-a-chip, IEEE J. Solid-State Circuits, vol. 31, pp , Dec memory design. Ya-Chin King (S 92 M 99) was born in Taiwan, R.O.C. She received the B.S. degree from National Taiwan University, Taipei, in 1992 and the M.S. degree from the Unversity of California, Berkeley, both in electrical engineering. Her master s work focused on thin oxide technology and novel quasi-nonvolatile memory. She joined National Tsing-Hua University, Hsinchu, Taiwan, in August 1999 as an Assistant Professor. Her research topics include thin gate dielectrics, CMOS image sensors, and nonvolatile
Lecture Notes 5 CMOS Image Sensor Device and Fabrication
Lecture Notes 5 CMOS Image Sensor Device and Fabrication CMOS image sensor fabrication technologies Pixel design and layout Imaging performance enhancement techniques Technology scaling, industry trends
More informationIEEE SENSORS JOURNAL, VOL. 4, NO. 1, FEBRUARY
IEEE SENSORS JOURNAL, VOL. 4, NO. 1, FEBRUARY 2004 135 Design, Optimization, and Performance Analysis of New Photodiode Structures for CMOS Active-Pixel-Sensor (APS) Imager Applications Chung-Yu Wu, Fellow,
More informationFundamentals of CMOS Image Sensors
CHAPTER 2 Fundamentals of CMOS Image Sensors Mixed-Signal IC Design for Image Sensor 2-1 Outline Photoelectric Effect Photodetectors CMOS Image Sensor(CIS) Array Architecture CIS Peripherals Design Considerations
More informationActive Pixel Sensors Fabricated in a Standard 0.18 um CMOS Technology
Active Pixel Sensors Fabricated in a Standard.18 um CMOS Technology Hui Tian, Xinqiao Liu, SukHwan Lim, Stuart Kleinfelder, and Abbas El Gamal Information Systems Laboratory, Stanford University Stanford,
More information3084 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 60, NO. 4, AUGUST 2013
3084 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 60, NO. 4, AUGUST 2013 Dummy Gate-Assisted n-mosfet Layout for a Radiation-Tolerant Integrated Circuit Min Su Lee and Hee Chul Lee Abstract A dummy gate-assisted
More informationUltra-high resolution 14,400 pixel trilinear color image sensor
Ultra-high resolution 14,400 pixel trilinear color image sensor Thomas Carducci, Antonio Ciccarelli, Brent Kecskemety Microelectronics Technology Division Eastman Kodak Company, Rochester, New York 14650-2008
More informationALTHOUGH zero-if and low-if architectures have been
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 6, JUNE 2005 1249 A 110-MHz 84-dB CMOS Programmable Gain Amplifier With Integrated RSSI Function Chun-Pang Wu and Hen-Wai Tsao Abstract This paper describes
More informationAS THE semiconductor process is scaled down, the thickness
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 52, NO. 7, JULY 2005 361 A New Schmitt Trigger Circuit in a 0.13-m 1/2.5-V CMOS Process to Receive 3.3-V Input Signals Shih-Lun Chen,
More informationTRIANGULATION-BASED light projection is a typical
246 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 1, JANUARY 2004 A 120 110 Position Sensor With the Capability of Sensitive and Selective Light Detection in Wide Dynamic Range for Robust Active Range
More informationCHARGE-COUPLED device (CCD) technology has been. Photodiode Peripheral Utilization Effect on CMOS APS Pixel Performance Suat Utku Ay, Member, IEEE
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, VOL. 55, NO. 6, JULY 2008 1405 Photodiode Peripheral Utilization Effect on CMOS APS Pixel Performance Suat Utku Ay, Member, IEEE Abstract A
More informationLow Voltage Low Power CMOS Image Sensor with A New Rail-to-Rail Readout Circuit
Low Voltage Low Power CMOS Image Sensor with A New Rail-to-Rail Readout Circuit HWANG-CHERNG CHOW and JEN-BOR HSIAO Department and Graduate Institute of Electronics Engineering Chang Gung University 259
More informationA Current Mirroring Integration Based Readout Circuit for High Performance Infrared FPA Applications
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 50, NO. 4, APRIL 2003 181 A Current Mirroring Integration Based Readout Circuit for High Performance Infrared FPA
More informationIEEE. Proof. CHARGE-COUPLED device (CCD) technology has been
TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, VOL. 55, NO. 6, JULY 2008 1 Photodiode Peripheral Utilization Effect on CMOS APS Pixel Performance Suat Utku Ay, Member, Abstract A photodiode (PD)-type
More informationFUTURE PROSPECTS FOR CMOS ACTIVE PIXEL SENSORS
FUTURE PROSPECTS FOR CMOS ACTIVE PIXEL SENSORS Dr. Eric R. Fossum Jet Propulsion Laboratory Dr. Philip H-S. Wong IBM Research 1995 IEEE Workshop on CCDs and Advanced Image Sensors April 21, 1995 CMOS APS
More informationDemonstration of a Frequency-Demodulation CMOS Image Sensor
Demonstration of a Frequency-Demodulation CMOS Image Sensor Koji Yamamoto, Keiichiro Kagawa, Jun Ohta, Masahiro Nunoshita Graduate School of Materials Science, Nara Institute of Science and Technology
More informationRECENTLY, CMOS imagers, which integrate photosensors, A New CMOS Pixel Structure for Low-Dark-Current and Large-Array-Size Still Imager Applications
2204 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, VOL. 51, NO. 11 NOVEMBER 2004 A New CMOS Pixel Structure for Low-Dark-Current and Large-Array-Size Still Imager Applications Yu-Chuan Shih,
More informationPhotons and solid state detection
Photons and solid state detection Photons represent discrete packets ( quanta ) of optical energy Energy is hc/! (h: Planck s constant, c: speed of light,! : wavelength) For solid state detection, photons
More informationTrend of CMOS Imaging Device Technologies
004 6 ( ) CMOS : Trend of CMOS Imaging Device Technologies 3 7110 Abstract Which imaging device survives in the current fast-growing and competitive market, imagers or CMOS imagers? Although this question
More informationWITH the rapid evolution of liquid crystal display (LCD)
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 43, NO. 2, FEBRUARY 2008 371 A 10-Bit LCD Column Driver With Piecewise Linear Digital-to-Analog Converters Chih-Wen Lu, Member, IEEE, and Lung-Chien Huang Abstract
More informationESD-Transient Detection Circuit with Equivalent Capacitance-Coupling Detection Mechanism and High Efficiency of Layout Area in a 65nm CMOS Technology
ESD-Transient Detection Circuit with Equivalent Capacitance-Coupling Detection Mechanism and High Efficiency of Layout Area in a 65nm CMOS Technology Chih-Ting Yeh (1, 2) and Ming-Dou Ker (1, 3) (1) Department
More information/$ IEEE
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 53, NO. 11, NOVEMBER 2006 1205 A Low-Phase Noise, Anti-Harmonic Programmable DLL Frequency Multiplier With Period Error Compensation for
More informationInterpixel crosstalk in a 3D-integrated active pixel sensor for x-ray detection
Interpixel crosstalk in a 3D-integrated active pixel sensor for x-ray detection The MIT Faculty has made this article openly available. Please share how this access benefits you. Your story matters. Citation
More informationPower and Area Efficient Column-Parallel ADC Architectures for CMOS Image Sensors
Power and Area Efficient Column-Parallel ADC Architectures for CMOS Image Sensors Martijn Snoeij 1,*, Albert Theuwissen 1,2, Johan Huijsing 1 and Kofi Makinwa 1 1 Delft University of Technology, The Netherlands
More informationCMOS Active Pixel Sensor Technology for High Performance Machine Vision Applications
CMOS Active Pixel Sensor Technology for High Performance Machine Vision Applications Nicholas A. Doudoumopoulol Lauren Purcell 1, and Eric R. Fossum 2 1Photobit, LLC 2529 Foothill Blvd. Suite 104, La Crescenta,
More informationMOSFET short channel effects
MOSFET short channel effects overview Five different short channel effects can be distinguished: velocity saturation drain induced barrier lowering (DIBL) impact ionization surface scattering hot electrons
More informationLow Power Highly Miniaturized Image Sensor Technology
Low Power Highly Miniaturized Image Sensor Technology Barmak Mansoorian* Eric R. Fossum* Photobit LLC 2529 Foothill Blvd. Suite 104, La Crescenta, CA 91214 (818) 248-4393 fax (818) 542-3559 email: barmak@photobit.com
More informationSession 3: Solid State Devices. Silicon on Insulator
Session 3: Solid State Devices Silicon on Insulator 1 Outline A B C D E F G H I J 2 Outline Ref: Taurand Ning 3 SOI Technology SOl materials: SIMOX, BESOl, and Smart Cut SIMOX : Synthesis by IMplanted
More informationA DIGITAL CMOS ACTIVE PIXEL IMAGE SENSOR FOR MULTIMEDIA APPLICATIONS. Zhimin Zhou, Bedabrata Paint, Jason Woo, and Eric R. Fossum*
A DIGITAL CMOS ACTIVE PIXEL IMAGE SENSO FO MULTIMEDIA APPLICATIONS Zhimin Zhou, Bedabrata Paint, Jason Woo, and Eric. Fossum* Electrical Engineering Department University of California, Los Angeles 405
More informationApplication of CMOS sensors in radiation detection
Application of CMOS sensors in radiation detection S. Ashrafi Physics Faculty University of Tabriz 1 CMOS is a technology for making low power integrated circuits. CMOS Complementary Metal Oxide Semiconductor
More informationIntegrate-and-Fire Neuron Circuit and Synaptic Device with Floating Body MOSFETs
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.14, NO.6, DECEMBER, 2014 http://dx.doi.org/10.5573/jsts.2014.14.6.755 Integrate-and-Fire Neuron Circuit and Synaptic Device with Floating Body MOSFETs
More informationE19 PTC and 4T APS. Cristiano Rocco Marra 20/12/2017
POLITECNICO DI MILANO MSC COURSE - MEMS AND MICROSENSORS - 2017/2018 E19 PTC and 4T APS Cristiano Rocco Marra 20/12/2017 In this class we will introduce the photon transfer tecnique, a commonly-used routine
More informationEE 392B: Course Introduction
EE 392B Course Introduction About EE392B Goals Topics Schedule Prerequisites Course Overview Digital Imaging System Image Sensor Architectures Nonidealities and Performance Measures Color Imaging Recent
More informationE LECTROOPTICAL(EO)modulatorsarekeydevicesinoptical
286 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 26, NO. 2, JANUARY 15, 2008 Design and Fabrication of Sidewalls-Extended Electrode Configuration for Ridged Lithium Niobate Electrooptical Modulator Yi-Kuei Wu,
More informationA design of 16-bit adiabatic Microprocessor core
194 A design of 16-bit adiabatic Microprocessor core Youngjoon Shin, Hanseung Lee, Yong Moon, and Chanho Lee Abstract A 16-bit adiabatic low-power Microprocessor core is designed. The processor consists
More informationELEN6350. Summary: High Dynamic Range Photodetector Hassan Eddrees, Matt Bajor
ELEN6350 High Dynamic Range Photodetector Hassan Eddrees, Matt Bajor Summary: The use of image sensors presents several limitations for visible light spectrometers. Both CCD and CMOS one dimensional imagers
More informationEVALUATION OF RADIATION HARDNESS DESIGN TECHNIQUES TO IMPROVE RADIATION TOLERANCE FOR CMOS IMAGE SENSORS DEDICATED TO SPACE APPLICATIONS
EVALUATION OF RADIATION HARDNESS DESIGN TECHNIQUES TO IMPROVE RADIATION TOLERANCE FOR CMOS IMAGE SENSORS DEDICATED TO SPACE APPLICATIONS P. MARTIN-GONTHIER, F. CORBIERE, N. HUGER, M. ESTRIBEAU, C. ENGEL,
More informationActive Pixel Sensors Fabricated in a Standard 0.18 urn CMOS Technology
Active Pixel Sensors Fabricated in a Standard 0.18 urn CMOS Technology Hui Tian, Xinqiao Liu, SukHwan Lim, Stuart Kleinfelder, and Abbas El Gamal Information Systems Laboratory, Stanford University Stanford,
More informationIntroduction. Chapter 1
1 Chapter 1 Introduction During the last decade, imaging with semiconductor devices has been continuously replacing conventional photography in many areas. Among all the image sensors, the charge-coupled-device
More informationAnalysis of 1=f Noise in CMOS Preamplifier With CDS Circuit
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 49, NO. 4, AUGUST 2002 1819 Analysis of 1=f Noise in CMOS Preamplifier With CDS Circuit Tae-Hoon Lee, Gyuseong Cho, Hee Joon Kim, Seung Wook Lee, Wanno Lee, and
More informationSemiconductor Physics and Devices
Metal-Semiconductor and Semiconductor Heterojunctions The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is one of two major types of transistors. The MOSFET is used in digital circuit, because
More informationIN RECENT years, we have often seen three-dimensional
622 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 4, APRIL 2004 Design and Implementation of Real-Time 3-D Image Sensor With 640 480 Pixel Resolution Yusuke Oike, Student Member, IEEE, Makoto Ikeda,
More informationAdvanced output chains for CMOS image sensors based on an active column sensor approach a detailed comparison
Sensors and Actuators A 116 (2004) 304 311 Advanced output chains for CMOS image sensors based on an active column sensor approach a detailed comparison Shai Diller, Alexander Fish, Orly Yadid-Pecht 1
More informationFully depleted, thick, monolithic CMOS pixels with high quantum efficiency
Fully depleted, thick, monolithic CMOS pixels with high quantum efficiency Andrew Clarke a*, Konstantin Stefanov a, Nicholas Johnston a and Andrew Holland a a Centre for Electronic Imaging, The Open University,
More informationDESIGN AND ANALYSIS OF LOW POWER CHARGE PUMP CIRCUIT FOR PHASE-LOCKED LOOP
DESIGN AND ANALYSIS OF LOW POWER CHARGE PUMP CIRCUIT FOR PHASE-LOCKED LOOP 1 B. Praveen Kumar, 2 G.Rajarajeshwari, 3 J.Anu Infancia 1, 2, 3 PG students / ECE, SNS College of Technology, Coimbatore, (India)
More informationRESISTOR-STRING digital-to analog converters (DACs)
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 53, NO. 6, JUNE 2006 497 A Low-Power Inverted Ladder D/A Converter Yevgeny Perelman and Ran Ginosar Abstract Interpolating, dual resistor
More informationA 1.3 Megapixel CMOS Imager Designed for Digital Still Cameras
A 1.3 Megapixel CMOS Imager Designed for Digital Still Cameras Paul Gallagher, Andy Brewster VLSI Vision Ltd. San Jose, CA/USA Abstract VLSI Vision Ltd. has developed the VV6801 color sensor to address
More informationLawrence Berkeley National Laboratory Lawrence Berkeley National Laboratory
Lawrence Berkeley National Laboratory Lawrence Berkeley National Laboratory Title Using an Active Pixel Sensor In A Vertex Detector Permalink https://escholarship.org/uc/item/5w19x8sx Authors Matis, Howard
More informationIN RECENT years, low-dropout linear regulators (LDOs) are
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 52, NO. 9, SEPTEMBER 2005 563 Design of Low-Power Analog Drivers Based on Slew-Rate Enhancement Circuits for CMOS Low-Dropout Regulators
More informationAn ambient-light sensor system with startup. correction, LTPS TFT, LCD
LETTER IEICE Electronics Express, Vol.11, No.5, 1 7 An ambient-light sensor system with startup correction for LTPS-TFT LCD Ilku Nam 1 and Doohyung Woo 2a) 1 Dept of EE and also with PNU LG Smart Control
More informationSingle-Ended to Differential Converter for Multiple-Stage Single-Ended Ring Oscillators
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 1, JANUARY 2003 141 Single-Ended to Differential Converter for Multiple-Stage Single-Ended Ring Oscillators Yuping Toh, Member, IEEE, and John A. McNeill,
More informationPHASE-LOCKED loops (PLLs) are widely used in many
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 58, NO. 3, MARCH 2011 149 Built-in Self-Calibration Circuit for Monotonic Digitally Controlled Oscillator Design in 65-nm CMOS Technology
More informationMAGNETORESISTIVE random access memory
132 IEEE TRANSACTIONS ON MAGNETICS, VOL. 41, NO. 1, JANUARY 2005 A 4-Mb Toggle MRAM Based on a Novel Bit and Switching Method B. N. Engel, J. Åkerman, B. Butcher, R. W. Dave, M. DeHerrera, M. Durlam, G.
More informationSimulation of High Resistivity (CMOS) Pixels
Simulation of High Resistivity (CMOS) Pixels Stefan Lauxtermann, Kadri Vural Sensor Creations Inc. AIDA-2020 CMOS Simulation Workshop May 13 th 2016 OUTLINE 1. Definition of High Resistivity Pixel Also
More informationPARALLEL coupled-line filters are widely used in microwave
2812 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 53, NO. 9, SEPTEMBER 2005 Improved Coupled-Microstrip Filter Design Using Effective Even-Mode and Odd-Mode Characteristic Impedances Hong-Ming
More informationSemiconductor Detector Systems
Semiconductor Detector Systems Helmuth Spieler Physics Division, Lawrence Berkeley National Laboratory OXFORD UNIVERSITY PRESS ix CONTENTS 1 Detector systems overview 1 1.1 Sensor 2 1.2 Preamplifier 3
More informationA Dynamic Range Expansion Technique for CMOS Image Sensors with Dual Charge Storage in a Pixel and Multiple Sampling
ensors 2008, 8, 1915-1926 sensors IN 1424-8220 2008 by MDPI www.mdpi.org/sensors Full Research Paper A Dynamic Range Expansion Technique for CMO Image ensors with Dual Charge torage in a Pixel and Multiple
More informationIntegrate-and-Fire Neuron Circuit and Synaptic Device using Floating Body MOSFET with Spike Timing- Dependent Plasticity
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.15, NO.6, DECEMBER, 2015 ISSN(Print) 1598-1657 http://dx.doi.org/10.5573/jsts.2015.15.6.658 ISSN(Online) 2233-4866 Integrate-and-Fire Neuron Circuit
More informationIT FR R TDI CCD Image Sensor
4k x 4k CCD sensor 4150 User manual v1.0 dtd. August 31, 2015 IT FR 08192 00 R TDI CCD Image Sensor Description: With the IT FR 08192 00 R sensor ANDANTA GmbH builds on and expands its line of proprietary
More informationA New Model for Thermal Channel Noise of Deep-Submicron MOSFETS and its Application in RF-CMOS Design
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 5, MAY 2001 831 A New Model for Thermal Channel Noise of Deep-Submicron MOSFETS and its Application in RF-CMOS Design Gerhard Knoblinger, Member, IEEE,
More informationVLSI DESIGN OF A HIGH-SPEED CMOS IMAGE SENSOR WITH IN-SITU 2D PROGRAMMABLE PROCESSING
VLSI DESIGN OF A HIGH-SED CMOS IMAGE SENSOR WITH IN-SITU 2D PROGRAMMABLE PROCESSING J.Dubois, D.Ginhac and M.Paindavoine Laboratoire Le2i - UMR CNRS 5158, Universite de Bourgogne Aile des Sciences de l
More informationA 7-GHz 1.8-dB NF CMOS Low-Noise Amplifier
852 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 7, JULY 2002 A 7-GHz 1.8-dB NF CMOS Low-Noise Amplifier Ryuichi Fujimoto, Member, IEEE, Kenji Kojima, and Shoji Otaka Abstract A 7-GHz low-noise amplifier
More information444 Index. F Fermi potential, 146 FGMOS transistor, 20 23, 57, 83, 84, 98, 205, 208, 213, 215, 216, 241, 242, 251, 280, 311, 318, 332, 354, 407
Index A Accuracy active resistor structures, 46, 323, 328, 329, 341, 344, 360 computational circuits, 171 differential amplifiers, 30, 31 exponential circuits, 285, 291, 292 multifunctional structures,
More informationPower MOSFET Zheng Yang (ERF 3017,
ECE442 Power Semiconductor Devices and Integrated Circuits Power MOSFET Zheng Yang (ERF 3017, email: yangzhen@uic.edu) Evolution of low-voltage (
More informationNoise Performance of Time-Domain CMOS Image Sensors
Chapter 10 Noise Performance of Time-Domain CMOS Image Sensors Fernando de S. Campos, José Alfredo C. Ulson, José Eduardo C. Castanho and Paulo R. Aguiar Additional information is available at the end
More informationTHE CCD RIDDLE REVISTED: SIGNAL VERSUS TIME LINEAR SIGNAL VERSUS VARIANCE NON-LINEAR
THE CCD RIDDLE REVISTED: SIGNAL VERSUS TIME LINEAR SIGNAL VERSUS VARIANCE NON-LINEAR Mark Downing 1, Peter Sinclaire 1. 1 ESO, Karl Schwartzschild Strasse-2, 85748 Munich, Germany. ABSTRACT The photon
More informationA flexible compact readout circuit for SPAD arrays ABSTRACT Keywords: 1. INTRODUCTION 2. THE SPAD 2.1 Operation 7780C - 55
A flexible compact readout circuit for SPAD arrays Danial Chitnis * and Steve Collins Department of Engineering Science University of Oxford Oxford England OX13PJ ABSTRACT A compact readout circuit that
More informationNew York, New York circuits. A test vehicle consisting of 8, 32 and 96-stage delay lines
Wire transfer of charge packets for on chip CCD signal processing Eric R. Fossum Department of Electrical Engineering Columbia University New York, New York 10027 ABSTRACT A structure for the virtual transfer
More informationHigh-end CMOS Active Pixel Sensor for Hyperspectral Imaging
R11 High-end CMOS Active Pixel Sensor for Hyperspectral Imaging J. Bogaerts (1), B. Dierickx (1), P. De Moor (2), D. Sabuncuoglu Tezcan (2), K. De Munck (2), C. Van Hoof (2) (1) Cypress FillFactory, Schaliënhoevedreef
More informationA CMOS Imager with PFM/PWM Based Analogto-digital
Edith Cowan University Research Online ECU Publications Pre. 2011 2002 A CMOS Imager with PFM/PWM Based Analogto-digital Converter Amine Bermak Edith Cowan University 10.1109/ISCAS.2002.1010386 This conference
More informationImplementation of Neuromorphic System with Si-based Floating-body Synaptic Transistors
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.17, NO.2, APRIL, 2017 ISSN(Print) 1598-1657 https://doi.org/10.5573/jsts.2017.17.2.210 ISSN(Online) 2233-4866 Implementation of Neuromorphic System
More informationThis paper is part of the following report: UNCLASSIFIED
UNCLASSIFIED Defense Technical Information Center Compilation Part Notice ADPO 11304 TITLE: VGS Compensation Source Follower for the LTPS TFT LCD Data Driver Output Buffer DISTRIBUTION: Approved for public
More informationA NOVEL BIASED ANTI-PARALLEL SCHOTTKY DIODE STRUCTURE FOR SUBHARMONIC
Page 342 A NOVEL BIASED ANTI-PARALLEL SCHOTTKY DIODE STRUCTURE FOR SUBHARMONIC Trong-Huang Lee', Chen-Yu Chi", Jack R. East', Gabriel M. Rebeiz', and George I. Haddad" let Propulsion Laboratory California
More informationLow Power Design of Successive Approximation Registers
Low Power Design of Successive Approximation Registers Rabeeh Majidi ECE Department, Worcester Polytechnic Institute, Worcester MA USA rabeehm@ece.wpi.edu Abstract: This paper presents low power design
More informationDesign & Analysis of Low Power Full Adder
1174 Design & Analysis of Low Power Full Adder Sana Fazal 1, Mohd Ahmer 2 1 Electronics & communication Engineering Integral University, Lucknow 2 Electronics & communication Engineering Integral University,
More informationTHE THREE electrodes in an alternating current (ac) microdischarge
488 IEEE TRANSACTIONS ON PLASMA SCIENCE, VOL. 32, NO. 3, JUNE 2004 Firing and Sustaining Discharge Characteristics in Alternating Current Microdischarge Cell With Three Electrodes Hyun Kim and Heung-Sik
More informationAtypical op amp consists of a differential input stage,
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 33, NO. 6, JUNE 1998 915 Low-Voltage Class Buffers with Quiescent Current Control Fan You, S. H. K. Embabi, and Edgar Sánchez-Sinencio Abstract This paper presents
More informationOn Chip Active Decoupling Capacitors for Supply Noise Reduction for Power Gating and Dynamic Dual Vdd Circuits in Digital VLSI
ELEN 689 606 Techniques for Layout Synthesis and Simulation in EDA Project Report On Chip Active Decoupling Capacitors for Supply Noise Reduction for Power Gating and Dynamic Dual Vdd Circuits in Digital
More informationChapter 2 : Semiconductor Materials & Devices (II) Feb
Chapter 2 : Semiconductor Materials & Devices (II) 1 Reference 1. SemiconductorManufacturing Technology: Michael Quirk and Julian Serda (2001) 3. Microelectronic Circuits (5/e): Sedra & Smith (2004) 4.
More informationAnalysis and Simulation of CTIA-based Pixel Reset Noise
Analysis and Simulation of CTIA-based Pixel Reset Noise D. A. Van Blerkom Forza Silicon Corporation 48 S. Chester Ave., Suite 200, Pasadena, CA 91106 ABSTRACT This paper describes an approach for accurately
More informationA CMOS Image Sensor with Ultra Wide Dynamic Range Floating-Point Pixel-Level ADC
A 640 512 CMOS Image Sensor with Ultra Wide Dynamic Range Floating-Point Pixel-Level ADC David X.D. Yang, Abbas El Gamal, Boyd Fowler, and Hui Tian Information Systems Laboratory Electrical Engineering
More informationA fast programmable frequency divider with a wide dividing-ratio range and 50% duty-cycle
A fast programmable frequency divider with a wide dividing-ratio range and 50% duty-cycle Mo Zhang a), Syed Kamrul Islam b), and M. Rafiqul Haider c) Department of Electrical & Computer Engineering, University
More informationFOR contemporary memories, array structures and periphery
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 2, FEBRUARY 2005 515 A Novel High-Speed Sense Amplifier for Bi-NOR Flash Memories Chiu-Chiao Chung, Hongchin Lin, Member, IEEE, and Yen-Tai Lin Abstract
More informationACTIVE PIXEL SENSORS VS. CHARGE-COUPLED DEVICES
ACTIVE PIXEL SENSORS VS. CHARGE-COUPLED DEVICES Dr. Eric R. Fossum Imaging Systems Section Jet Propulsion Laboratory, California Institute of Technology (818) 354-3128 1993 IEEE Workshop on CCDs and Advanced
More informationABSTRACT. Keywords: 0,18 micron, CMOS, APS, Sunsensor, Microned, TNO, TU-Delft, Radiation tolerant, Low noise. 1. IMAGERS FOR SPACE APPLICATIONS.
Active pixel sensors: the sensor of choice for future space applications Johan Leijtens(), Albert Theuwissen(), Padmakumar R. Rao(), Xinyang Wang(), Ning Xie() () TNO Science and Industry, Postbus, AD
More informationDue to the absence of internal nodes, inverter-based Gm-C filters [1,2] allow achieving bandwidths beyond what is possible
A Forward-Body-Bias Tuned 450MHz Gm-C 3 rd -Order Low-Pass Filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V Supply Joeri Lechevallier 1,2, Remko Struiksma 1, Hani Sherry 2, Andreia Cathelin
More informationNEW WIRELESS applications are emerging where
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 4, APRIL 2004 709 A Multiply-by-3 Coupled-Ring Oscillator for Low-Power Frequency Synthesis Shwetabh Verma, Member, IEEE, Junfeng Xu, and Thomas H. Lee,
More informationEE301 Electronics I , Fall
EE301 Electronics I 2018-2019, Fall 1. Introduction to Microelectronics (1 Week/3 Hrs.) Introduction, Historical Background, Basic Consepts 2. Rewiev of Semiconductors (1 Week/3 Hrs.) Semiconductor materials
More informationWafer-scale 3D integration of silicon-on-insulator RF amplifiers
Wafer-scale integration of silicon-on-insulator RF amplifiers The MIT Faculty has made this article openly available. Please share how this access benefits you. Your story matters. Citation As Published
More informationEE 42/100 Lecture 23: CMOS Transistors and Logic Gates. Rev A 4/15/2012 (10:39 AM) Prof. Ali M. Niknejad
A. M. Niknejad University of California, Berkeley EE 100 / 42 Lecture 23 p. 1/16 EE 42/100 Lecture 23: CMOS Transistors and Logic Gates ELECTRONICS Rev A 4/15/2012 (10:39 AM) Prof. Ali M. Niknejad University
More informationReliability of deep submicron MOSFETs
Invited paper Reliability of deep submicron MOSFETs Francis Balestra Abstract In this work, a review of the reliability of n- and p-channel Si and SOI MOSFETs as a function of gate length and temperature
More informationA High Image Quality Fully Integrated CMOS Image Sensor
A High Image Quality Fully Integrated CMOS Image Sensor Matt Borg, Ray Mentzer and Kalwant Singh Hewlett-Packard Company, Corvallis, Oregon Abstract We describe the feature set and noise characteristics
More informationA Wide-Range Delay-Locked Loop With a Fixed Latency of One Clock Cycle
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 8, AUGUST 2002 1021 A Wide-Range Delay-Locked Loop With a Fixed Latency of One Clock Cycle Hsiang-Hui Chang, Student Member, IEEE, Jyh-Woei Lin, Ching-Yuan
More informationSolid State Devices- Part- II. Module- IV
Solid State Devices- Part- II Module- IV MOS Capacitor Two terminal MOS device MOS = Metal- Oxide- Semiconductor MOS capacitor - the heart of the MOSFET The MOS capacitor is used to induce charge at the
More informationCCD1600A Full Frame CCD Image Sensor x Element Image Area
- 1 - General Description CCD1600A Full Frame CCD Image Sensor 10560 x 10560 Element Image Area General Description The CCD1600 is a 10560 x 10560 image element solid state Charge Coupled Device (CCD)
More informationDevice design for global shutter operation in a 1.1-um pixel image sensor and its application to nearinfrared
Device design for global shutter operation in a 1.1-um pixel image sensor and its application to nearinfrared sensing Zach M. Beiley Robin Cheung Erin F. Hanelt Emanuele Mandelli Jet Meitzner Jae Park
More informationA Low-Power SRAM Design Using Quiet-Bitline Architecture
A Low-Power SRAM Design Using uiet-bitline Architecture Shin-Pao Cheng Shi-Yu Huang Electrical Engineering Department National Tsing-Hua University, Taiwan Abstract This paper presents a low-power SRAM
More informationA 200X100 ARRAY OF ELECTRONICALLY CALIBRATABLE LOGARITHMIC CMOS PIXELS
A 200X100 ARRAY OF ELECTRONICALLY CALIBRATABLE LOGARITHMIC CMOS PIXELS Bhaskar Choubey, Satoshi Aoyama, Dileepan Joseph, Stephen Otim and Steve Collins Department of Engineering Science, University of
More informationFUNDAMENTALS OF MODERN VLSI DEVICES
19-13- FUNDAMENTALS OF MODERN VLSI DEVICES YUAN TAUR TAK H. MING CAMBRIDGE UNIVERSITY PRESS Physical Constants and Unit Conversions List of Symbols Preface page xi xiii xxi 1 INTRODUCTION I 1.1 Evolution
More information2 nd Generation CMOS Charge Transfer TDI: Results on Proton Irradiation
2 nd Generation CMOS Charge Transfer TDI: Results on Proton Irradiation F. Mayer, J. Endicott, F. Devriere e2v, Avenue de Rochepleine, BP123, 38521 Saint Egrève Cedex, France J. Rushton, K. Stefanov, A.
More informationDelay-Locked Loop Using 4 Cell Delay Line with Extended Inverters
International Journal of Electronics and Electrical Engineering Vol. 2, No. 4, December, 2014 Delay-Locked Loop Using 4 Cell Delay Line with Extended Inverters Jefferson A. Hora, Vincent Alan Heramiz,
More information